Pavel Peleska

Person

Grafelfing, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Data rate adaptive link speed configuration for connection between...
- Patent number 10,866,625
- Issue date Dec 15, 2020
- Intel Corporation
- Reinhold Schneider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interprocessor power state transitions
- Patent number 10,627,886
- Issue date Apr 21, 2020
- Intel Corporation
- Ulrich Leucht-Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data rate-adaptive data transfer between modems and host platforms
- Patent number 10,509,762
- Issue date Dec 17, 2019
- Intel IP Corporation
- Pavel Peleska
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interprocessor power state transitions
- Patent number 9,946,325
- Issue date Apr 17, 2018
- Intel IP Corporation
- Ulrich Leucht-Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for establishing consistent memory contents in re...
- Patent number 6,959,400
- Issue date Oct 25, 2005
- Siemens Aktiengesellschaft
- Pavel Peleska
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus system for a highly scalable multiprocessor system and method f...
- Patent number 6,757,766
- Issue date Jun 29, 2004
- Siemens Aktiengesellschaft
- Franz Hutner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for indentifying defects in electronic assemblies
- Patent number 6,642,733
- Issue date Nov 4, 2003
- Siemens Aktiengesellschaft
- Pavel Peleska
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit for preventing module damage in integrated circuits which r...
- Patent number 6,236,549
- Issue date May 22, 2001
- Siemens Aktiengesellschaft
- Pavel Peleska
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
DATA RATE ADAPTIVE LINK SPEED
- Publication number 20190121417
- Publication date Apr 25, 2019
- Intel Corporation
- Reinhold Schneider
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System, Apparatus And Method For Traffic Shaping Of Data Communicat...
- Publication number 20190081900
- Publication date Mar 14, 2019
- Intel Corporation
- Pavel Peleska
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTERPROCESSOR POWER STATE TRANSITIONS
- Publication number 20190064915
- Publication date Feb 28, 2019
- Intel IP Corporation
- Ulrich Leucht-Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA RATE-ADAPTIVE DATA TRANSFER BETWEEN MODEMS AND HOST PLATFORMS
- Publication number 20190042522
- Publication date Feb 7, 2019
- Pavel Peleska
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERPROCESSOR POWER STATE TRANSITIONS
- Publication number 20180004273
- Publication date Jan 4, 2018
- Intel IP Corporation
- Ulrich Leucht-Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Device for Insuring Consistent Memory Contents in Redund...
- Publication number 20080313413
- Publication date Dec 18, 2008
- Franz Hutner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for synchronizing events, particularly for processors of fau...
- Publication number 20060195849
- Publication date Aug 31, 2006
- Pavel Peleska
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit arrangement and method of a multiprocessor system
- Publication number 20060031642
- Publication date Feb 9, 2006
- Martin Maenz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for event synchronisation, especially for processors of faul...
- Publication number 20050229035
- Publication date Oct 13, 2005
- Pavel Peleska
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and circuit arrangement for synchronization of synchronously...
- Publication number 20040193735
- Publication date Sep 30, 2004
- Pavel Peleska
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and arrangement for detecting and correcting line defects
- Publication number 20040177289
- Publication date Sep 9, 2004
- Pavel Peleska
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for establishing consistent memory contents in re...
- Publication number 20030041220
- Publication date Feb 27, 2003
- Pavel Peleska
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for monitoring consistent memory contents in redundant systems
- Publication number 20030041290
- Publication date Feb 27, 2003
- Pavel Peleska
- G05 - CONTROLLING REGULATING

Pavel Peleska

Person

Patents Grantslast 30 patents

Data rate adaptive link speed configuration for connection between...

Interprocessor power state transitions

Data rate-adaptive data transfer between modems and host platforms

Interprocessor power state transitions

System and method for establishing consistent memory contents in re...

Bus system for a highly scalable multiprocessor system and method f...

Apparatus for indentifying defects in electronic assemblies

Circuit for preventing module damage in integrated circuits which r...

Patents Applicationslast 30 patents

DATA RATE ADAPTIVE LINK SPEED

System, Apparatus And Method For Traffic Shaping Of Data Communicat...

INTERPROCESSOR POWER STATE TRANSITIONS

DATA RATE-ADAPTIVE DATA TRANSFER BETWEEN MODEMS AND HOST PLATFORMS

INTERPROCESSOR POWER STATE TRANSITIONS

Method and Device for Insuring Consistent Memory Contents in Redund...

Method for synchronizing events, particularly for processors of fau...

Circuit arrangement and method of a multiprocessor system

Method for event synchronisation, especially for processors of faul...

Method and circuit arrangement for synchronization of synchronously...

Method and arrangement for detecting and correcting line defects

System and method for establishing consistent memory contents in re...

Method for monitoring consistent memory contents in redundant systems