Membership
Tour
Register
Log in
Pawitter P. Bhatia
Follow
Person
Chandler, AZ, US
People
Overview
Industries
Organizations
People
Information
Impact
Patents Grants
last 30 patents
Information
Patent Grant
Interface logic for a multi-core system-on-a-chip (SoC)
Patent number
9,189,439
Issue date
Nov 17, 2015
Intel Corporation
Ramana Rachakonda
G01 - MEASURING TESTING
Information
Patent Grant
Interface logic for a multi-core system-on-a-chip (SoC)
Patent number
8,650,629
Issue date
Feb 11, 2014
Intel Corporation
Ramana Rachakonda
G01 - MEASURING TESTING
Patents Applications
last 30 patents
Information
Patent Application
INTERFACE LOGIC FOR A MULTI-CORE SYSTEM-ON-A-CHIP (SOC)
Publication number
20140108695
Publication date
Apr 17, 2014
Ramana Rachakonda
G01 - MEASURING TESTING
Information
Patent Application
Interface Logic For A Multi-Core System-On-A-Chip (SoC)
Publication number
20110145909
Publication date
Jun 16, 2011
Ramana Rachakonda
G06 - COMPUTING CALCULATING COUNTING