Pei-Yi Liu

Person

Changhua, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device structure with uneven gate profile
- Patent number 12,166,096
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chi-Sheng Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device structure with uneven gate profile
- Patent number 11,631,745
- Issue date Apr 18, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chi-Sheng Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating an integrated circuit with non-printable dumm...
- Patent number 11,061,317
- Issue date Jul 13, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of fabricating an integrated circuit with a pattern density-...
- Patent number 10,811,225
- Issue date Oct 20, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating an integrated circuit with a pattern density-...
- Patent number 10,431,423
- Issue date Oct 1, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating an integrated circuit with non-printable dumm...
- Patent number 10,359,695
- Issue date Jul 23, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of fabricating an integrated circuit with a pattern density-...
- Patent number 10,170,276
- Issue date Jan 1, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Grid refinement method
- Patent number 9,678,434
- Issue date Jun 13, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
System and technique for rasterizing circuit layout data
- Patent number 9,658,538
- Issue date May 23, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Pei-Yi Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of fabricating an integrated circuit with non-printable dumm...
- Patent number 9,594,862
- Issue date Mar 14, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of fabricating an integrated circuit with a pattern density-...
- Patent number 9,552,964
- Issue date Jan 24, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Grid refinement method
- Patent number 9,529,271
- Issue date Dec 27, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of fabricating an integrated circuit with block dummy for op...
- Patent number 9,436,788
- Issue date Sep 6, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of fabricating an integrated circuit with optimized pattern...
- Patent number 9,436,787
- Issue date Sep 6, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Grid refinement method
- Patent number 9,329,488
- Issue date May 3, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Grid refinement method
- Patent number 9,176,389
- Issue date Nov 3, 2015
- Taiwan Semiconductor Manfacturing Company, Ltd.
- Wen-Chuan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple-patterning overlay decoupling method
- Patent number 9,134,627
- Issue date Sep 15, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Long-range lithographic dose correction
- Patent number 8,984,452
- Issue date Mar 17, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Hung Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for electron beam proximity correction with improved critica...
- Patent number 8,972,908
- Issue date Mar 3, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Hung Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple-grid exposure method
- Patent number 8,828,632
- Issue date Sep 9, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Grid refinement method
- Patent number 8,822,107
- Issue date Sep 2, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Grid refinement method
- Patent number 8,822,106
- Issue date Sep 2, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-directional dithering methods
- Patent number 8,584,057
- Issue date Nov 12, 2013
- Taiwan Semiconductor Manufacturing Copmany, Ltd.
- Pei-Yi Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple-grid exposure method
- Patent number 8,530,121
- Issue date Sep 10, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen Chuan Wang
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Error diffusion and grid shift in lithography
- Patent number 8,510,687
- Issue date Aug 13, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Pei-Yi Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Pressure sensitive electrochromic device and method of fabricating...
- Patent number 7,158,276
- Issue date Jan 2, 2007
- Daxon Technology Inc.
- Chen Peng
- G02 - OPTICS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device Structure with Uneven Gate Profile
- Publication number 20230253470
- Publication date Aug 10, 2023
- Taiwan Semiconductor Manufacturing Co., LTD
- Chi-Sheng Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device Structure with Uneven Gate Profile
- Publication number 20210359095
- Publication date Nov 18, 2021
- Taiwan Semiconductor Manufacturing Co., LTD
- Chi-Sheng Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING AN INTEGRATED CIRCUIT WITH A PATTERN DENSITY-...
- Publication number 20200027699
- Publication date Jan 23, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Fabricating an Integrated Circuit with Non-Printable Dumm...
- Publication number 20190339610
- Publication date Nov 7, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF FABRICATING AN INTEGRATED CIRCUIT WITH A PATTERN DENSITY-...
- Publication number 20190214227
- Publication date Jul 11, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING AN INTEGRATED CIRCUIT WITH A PATTERN DENSITY-...
- Publication number 20170186584
- Publication date Jun 29, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Fabricating an Integrated Circuit With Non-Printable Dumm...
- Publication number 20170176849
- Publication date Jun 22, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRID REFINEMENT METHOD
- Publication number 20170102624
- Publication date Apr 13, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Grid Refinement Method
- Publication number 20160246912
- Publication date Aug 25, 2016
- Wen-Chuan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND TECHNIQUE FOR RASTERIZING CIRCUIT LAYOUT DATA
- Publication number 20160180005
- Publication date Jun 23, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Pei-Yi Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Grid Refinement Method
- Publication number 20160055291
- Publication date Feb 25, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of Fabricating an Integrated Circuit with Non-Printable Dumm...
- Publication number 20150370942
- Publication date Dec 24, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of Fabricating an Integrated Circuit with Block Dummy for Op...
- Publication number 20150294057
- Publication date Oct 15, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of Fabricating an Integrated Circuit with Optimized Pattern...
- Publication number 20150294056
- Publication date Oct 15, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jyuh-Fuh Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LONG-RANGE LITHOGRAPHIC DOSE CORRECTION
- Publication number 20150052489
- Publication date Feb 19, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Hung Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Electron Beam Proximity Correction with Improved Critica...
- Publication number 20150040079
- Publication date Feb 5, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Hung Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Grid Refinement Method
- Publication number 20140368806
- Publication date Dec 18, 2014
- Wen-Chuan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Grid Refinement Method
- Publication number 20130273475
- Publication date Oct 17, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Grid Refinement Method
- Publication number 20130273474
- Publication date Oct 17, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DIFFUSION AND GRID SHIFT IN LITHOGRAPHY
- Publication number 20130232455
- Publication date Sep 5, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Pei-Yi Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
NON-DIRECTIONAL DITHERING METHODS
- Publication number 20130232453
- Publication date Sep 5, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Pei-Yi Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple-Grid Exposure Method
- Publication number 20130203001
- Publication date Aug 8, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- B82 - NANO-TECHNOLOGY
Information Patent Application
Multiple-Patterning Overlay Decoupling Method
- Publication number 20130157389
- Publication date Jun 20, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Chuan Wang
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Semiconductor device structure with uneven gate profile

Semiconductor device structure with uneven gate profile

Method of fabricating an integrated circuit with non-printable dumm...

Method of fabricating an integrated circuit with a pattern density-...

Method of fabricating an integrated circuit with a pattern density-...

Method of fabricating an integrated circuit with non-printable dumm...

Method of fabricating an integrated circuit with a pattern density-...

Grid refinement method

System and technique for rasterizing circuit layout data

Method of fabricating an integrated circuit with non-printable dumm...

Method of fabricating an integrated circuit with a pattern density-...

Grid refinement method

Method of fabricating an integrated circuit with block dummy for op...

Method of fabricating an integrated circuit with optimized pattern...

Grid refinement method

Grid refinement method

Multiple-patterning overlay decoupling method

Long-range lithographic dose correction

Method for electron beam proximity correction with improved critica...

Multiple-grid exposure method

Grid refinement method

Grid refinement method

Non-directional dithering methods

Multiple-grid exposure method

Error diffusion and grid shift in lithography

Pressure sensitive electrochromic device and method of fabricating...

Patents Applicationslast 30 patents

Semiconductor Device Structure with Uneven Gate Profile

Semiconductor Device Structure with Uneven Gate Profile

METHOD OF FABRICATING AN INTEGRATED CIRCUIT WITH A PATTERN DENSITY-...

Method of Fabricating an Integrated Circuit with Non-Printable Dumm...

METHOD OF FABRICATING AN INTEGRATED CIRCUIT WITH A PATTERN DENSITY-...

METHOD OF FABRICATING AN INTEGRATED CIRCUIT WITH A PATTERN DENSITY-...

Method of Fabricating an Integrated Circuit With Non-Printable Dumm...

GRID REFINEMENT METHOD

Grid Refinement Method

SYSTEM AND TECHNIQUE FOR RASTERIZING CIRCUIT LAYOUT DATA

Grid Refinement Method

Method of Fabricating an Integrated Circuit with Non-Printable Dumm...

Method of Fabricating an Integrated Circuit with Block Dummy for Op...

Method of Fabricating an Integrated Circuit with Optimized Pattern...

LONG-RANGE LITHOGRAPHIC DOSE CORRECTION

Method for Electron Beam Proximity Correction with Improved Critica...

Grid Refinement Method

Grid Refinement Method

Grid Refinement Method

ERROR DIFFUSION AND GRID SHIFT IN LITHOGRAPHY

NON-DIRECTIONAL DITHERING METHODS

Multiple-Grid Exposure Method

Multiple-Patterning Overlay Decoupling Method