Peipei Wang

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Scalable and interoperable PHYLESS die-to-die IO solution
- Patent number 12,159,840
- Issue date Dec 3, 2024
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power-forwarding bridge for inter-chip data signal transfer
- Patent number 12,100,662
- Issue date Sep 24, 2024
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Clock phase compensation apparatus and method
- Patent number 10,686,582
- Issue date Jun 16, 2020
- Intel Corporation
- Gerald Pasdast
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MICROELECTRONIC DIE INCLUDING SWAPPABLE PHY CIRCUITRY AND SEMICONDU...
- Publication number 20230230923
- Publication date Jul 20, 2023
- Intel Corporation
- Gerald Pasdast
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
QUASI-MONOLITHIC INTEGRATED PACKAGING ARCHITECTURE WITH MID-DIE SER...
- Publication number 20230197676
- Publication date Jun 22, 2023
- Intel Corporation
- Gerald S. Pasdast
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGING ARCHITECTURE WITH INTEGRATED CIRCUIT DIES OVER INPUT/OUTP...
- Publication number 20230197675
- Publication date Jun 22, 2023
- Intel Corporation
- Gerald S. Pasdast
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CLOCK INTERPOLATION SYSTEM FOR EYE-CENTERING
- Publication number 20220393672
- Publication date Dec 8, 2022
- Jayen Desai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LANE REPAIR AND LANE REVERSAL IMPLEMENTATION FOR DIE-TO-DIE (D2D) I...
- Publication number 20220327276
- Publication date Oct 13, 2022
- Intel Corporation
- Lakshmipriya Seshan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK PHASE MANAGEMENT FOR DIE-TO-DIE (D2D) INTERCONNECT
- Publication number 20220271912
- Publication date Aug 25, 2022
- Gerald Pasdast
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
POWER-FORWARDING BRIDGE FOR INTER-CHIP DATA SIGNAL TRANSFER
- Publication number 20220199537
- Publication date Jun 23, 2022
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SCALABLE AND INTEROPERABLE PHYLESS DIE-TO-DIE IO SOLUTION
- Publication number 20210398906
- Publication date Dec 23, 2021
- Intel Corporation
- Zhiguo QIAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE CLOCK SOURCE FOR A MULTIPLE DIE PACKAGE
- Publication number 20190041895
- Publication date Feb 7, 2019
- Yingyu Miao
- G06 - COMPUTING CALCULATING COUNTING

Peipei Wang

Person

Patents Grantslast 30 patents

Scalable and interoperable PHYLESS die-to-die IO solution

Power-forwarding bridge for inter-chip data signal transfer

Clock phase compensation apparatus and method

Patents Applicationslast 30 patents

MICROELECTRONIC DIE INCLUDING SWAPPABLE PHY CIRCUITRY AND SEMICONDU...

QUASI-MONOLITHIC INTEGRATED PACKAGING ARCHITECTURE WITH MID-DIE SER...

PACKAGING ARCHITECTURE WITH INTEGRATED CIRCUIT DIES OVER INPUT/OUTP...

CLOCK INTERPOLATION SYSTEM FOR EYE-CENTERING

LANE REPAIR AND LANE REVERSAL IMPLEMENTATION FOR DIE-TO-DIE (D2D) I...

CLOCK PHASE MANAGEMENT FOR DIE-TO-DIE (D2D) INTERCONNECT

POWER-FORWARDING BRIDGE FOR INTER-CHIP DATA SIGNAL TRANSFER

SCALABLE AND INTEROPERABLE PHYLESS DIE-TO-DIE IO SOLUTION

SINGLE CLOCK SOURCE FOR A MULTIPLE DIE PACKAGE