PER HAMMARLUND

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Programmable event driven yield mechanism which may activate other...
- Patent number 10,877,910
- Issue date Dec 29, 2020
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable event driven yield mechanism which may activate other...
- Patent number 10,459,858
- Issue date Oct 29, 2019
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for instruction set based thread execution on a plurality...
- Patent number 10,452,403
- Issue date Oct 22, 2019
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronization of interrupt processing to reduce power consumption
- Patent number 10,089,263
- Issue date Oct 2, 2018
- Intel Corporation
- Thiam Wah Loh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for instruction set based thread execution of a plurality...
- Patent number 9,990,206
- Issue date Jun 5, 2018
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable event driven yield mechanism which may activate other...
- Patent number 9,910,796
- Issue date Mar 6, 2018
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-assisted virtualization for implementing secure video outp...
- Patent number 9,785,576
- Issue date Oct 10, 2017
- Intel Corporation
- Thiam Wah Loh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compare and exchange operation using sleep-wakeup mechanism
- Patent number 9,733,937
- Issue date Aug 15, 2017
- Intel Corporation
- Bratin Saha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for instruction set based thread execution on a plurality...
- Patent number 9,720,697
- Issue date Aug 1, 2017
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single instruction for specifying a subset of registers to save pri...
- Patent number 9,600,283
- Issue date Mar 21, 2017
- Intel Corporation
- Ethan Schuchman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction set architecture-based inter-sequencer communications w...
- Patent number 9,588,771
- Issue date Mar 7, 2017
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction set architecture-based inter-sequencer communications w...
- Patent number 9,459,874
- Issue date Oct 4, 2016
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single instruction for specifying and saving a subset of registers,...
- Patent number 9,164,764
- Issue date Oct 20, 2015
- Intel Corporation
- Ethan Schuchman
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Instruction for enabling a processor wait state
- Patent number 9,032,232
- Issue date May 12, 2015
- Intel Corporation
- Martin G. Dixon
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Instruction for enabling a processor wait state
- Patent number 8,990,597
- Issue date Mar 24, 2015
- Intel Corporation
- Martin G. Dixon
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Inter-processor interrupts
- Patent number 8,984,199
- Issue date Mar 17, 2015
- Intel Corporation
- Per Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction set architecture-based inter-sequencer communications w...
- Patent number 8,914,618
- Issue date Dec 16, 2014
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable event driven yield mechanism which may activate other...
- Patent number 8,868,887
- Issue date Oct 21, 2014
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique to perform three-source operations
- Patent number 8,825,989
- Issue date Sep 2, 2014
- Intel Corporation
- Avinash Sodani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for using memory attributes
- Patent number 8,812,792
- Issue date Aug 19, 2014
- Intel Corporation
- Quinn A. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single instruction for specifying and saving a subset of registers,...
- Patent number 8,762,692
- Issue date Jun 24, 2014
- Intel Corporation
- Ethan Schuchman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable event-driven yield mechanism
- Patent number 8,762,694
- Issue date Jun 24, 2014
- Intel Corporation
- Xiang Zou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for instruction set based thread execution on a plurality...
- Patent number 8,719,819
- Issue date May 6, 2014
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative multi-threading for instruction prefetch and/or trace p...
- Patent number 8,719,806
- Issue date May 6, 2014
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compare and exchange operation using sleep-wakeup mechanism
- Patent number 8,607,241
- Issue date Dec 10, 2013
- Intel Corporation
- Bratin Saha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique to perform three-source operations
- Patent number 8,589,663
- Issue date Nov 19, 2013
- Intel Corporation
- Avinash Sodani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for using memory attributes
- Patent number 8,560,781
- Issue date Oct 15, 2013
- Intel Corporation
- Quinn A. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector completion mask handling
- Patent number 8,510,536
- Issue date Aug 13, 2013
- Intel Corporation
- Stephan Jourdan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction for enabling a processor wait state
- Patent number 8,464,035
- Issue date Jun 11, 2013
- Intel Corporation
- Martin G. Dixon
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and apparatus for cost and power efficient, scalable operati...
- Patent number 8,386,823
- Issue date Feb 26, 2013
- Intel Corporation
- Arvind Kumar
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Patents Applicationslast 30 patents

Information Patent Application
PROGRAMMABLE EVENT DRIVEN YIELD MECHANISM WHICH MAY ACTIVATE OTHER...
- Publication number 20180060258
- Publication date Mar 1, 2018
- HONG WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE EVENT DRIVEN YIELD MECHANISM WHICH MAY ACTIVATE OTHER...
- Publication number 20170206083
- Publication date Jul 20, 2017
- HONG WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONIZATION OF INTERRUPT PROCESSING TO REDUCE POWER CONSUMPTION
- Publication number 20170161096
- Publication date Jun 8, 2017
- THIAM WAH LOH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM FOR INSTRUCTION SET BASED THREAD EXECUTION ON A PLURALITY...
- Publication number 20170010895
- Publication date Jan 12, 2017
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR POWER OPTIMIZED IoT COMMUNICATION
- Publication number 20160095060
- Publication date Mar 31, 2016
- Intel Corporation
- Parmoon Seddighrad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MECHANISM FOR INSTRUCTION SET BASED THREAD EXECUTION ON A PLURALITY...
- Publication number 20160019067
- Publication date Jan 21, 2016
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods And Apparatuses For Reducing Power Consumption Of Processor...
- Publication number 20160004533
- Publication date Jan 7, 2016
- Intel Corporation
- Ethan Schuchman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURING SHARED INTERCONNECT FOR VIRTUAL MACHINE
- Publication number 20150277949
- Publication date Oct 1, 2015
- THIAM WAH LOH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE-ASSISTED VIRTUALIZATION FOR IMPLEMENTING SECURE VIDEO OUTP...
- Publication number 20150278119
- Publication date Oct 1, 2015
- THIAM WAH LOH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction Set Architecture-Based Inter-Sequencer Communications W...
- Publication number 20150070368
- Publication date Mar 12, 2015
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR TRANSACTIONAL SPECULATION CONTROL...
- Publication number 20150032998
- Publication date Jan 29, 2015
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods And Apparatuses For Reducing Power Consumption Of Processor...
- Publication number 20140258757
- Publication date Sep 11, 2014
- Ethan Schuchman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE TO PERFORM THREE-SOURCE OPERATIONS
- Publication number 20140052963
- Publication date Feb 20, 2014
- Avinash Sodani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR USING MEMORY ATTRIBUTES
- Publication number 20140025901
- Publication date Jan 23, 2014
- Quinn A. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction For Enabling A Processor Wait State
- Publication number 20130246824
- Publication date Sep 19, 2013
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPARE AND EXCHANGE OPERATION USING SLEEP-WAKEUP MECHANISM
- Publication number 20130232499
- Publication date Sep 5, 2013
- Bratin Saha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM FOR INSTRUCTION SET BASED THREAD EXECUTION OF A PLURALITY...
- Publication number 20130219399
- Publication date Aug 22, 2013
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE EVENT DRIVEN YIELD MECHANISM WHICH MAY ACTIVATE OTHER...
- Publication number 20130219096
- Publication date Aug 22, 2013
- HONG WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SET ARCHITECTURE-BASED INTER-SEQUENCER COMMUNICATIONS W...
- Publication number 20130205122
- Publication date Aug 8, 2013
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRIMITIVES TO ENHANCE THREAD-LEVEL SPECULATION
- Publication number 20130073835
- Publication date Mar 21, 2013
- Quinn A. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM FOR INSTRUCTION SET BASED THREAD EXECUTION ON A PLURALITY...
- Publication number 20130054940
- Publication date Feb 28, 2013
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Vector Completion Mask Handling
- Publication number 20120272046
- Publication date Oct 25, 2012
- Stephan Jourdan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR COST AND POWER EFFICIENT, SCALABLE OPERATI...
- Publication number 20120192000
- Publication date Jul 26, 2012
- Arvind Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRIMITIVES TO ENHANCE THREAD-LEVEL SPECULATION
- Publication number 20120084536
- Publication date Apr 5, 2012
- Quinn A. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For Virtualized Microcode Sequencing
- Publication number 20110296096
- Publication date Dec 1, 2011
- Xiang Zou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR USING MEMORY ATTRIBUTES
- Publication number 20110264866
- Publication date Oct 27, 2011
- Quinn A. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction For Enabling A Procesor Wait State
- Publication number 20110154079
- Publication date Jun 23, 2011
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRIMITIVES TO ENHANCE THREAD-LEVEL SPECULATION
- Publication number 20110087867
- Publication date Apr 14, 2011
- Quinn A. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR AFFINITY-GUIDED SPECULATIVE HELPER THREADS...
- Publication number 20110035555
- Publication date Feb 10, 2011
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECULATIVE MULTI-THREADING FOR INSTRUCTION PREFETCH AND/OR TRACE P...
- Publication number 20100332811
- Publication date Dec 30, 2010
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING

PER HAMMARLUND

Person

Patents Grantslast 30 patents

Programmable event driven yield mechanism which may activate other...

Programmable event driven yield mechanism which may activate other...

Mechanism for instruction set based thread execution on a plurality...

Synchronization of interrupt processing to reduce power consumption

Mechanism for instruction set based thread execution of a plurality...

Programmable event driven yield mechanism which may activate other...

Hardware-assisted virtualization for implementing secure video outp...

Compare and exchange operation using sleep-wakeup mechanism

Mechanism for instruction set based thread execution on a plurality...

Single instruction for specifying a subset of registers to save pri...

Instruction set architecture-based inter-sequencer communications w...

Instruction set architecture-based inter-sequencer communications w...

Single instruction for specifying and saving a subset of registers,...

Instruction for enabling a processor wait state

Instruction for enabling a processor wait state

Inter-processor interrupts

Instruction set architecture-based inter-sequencer communications w...

Programmable event driven yield mechanism which may activate other...

Technique to perform three-source operations

Technique for using memory attributes

Single instruction for specifying and saving a subset of registers,...

Programmable event-driven yield mechanism

Mechanism for instruction set based thread execution on a plurality...

Speculative multi-threading for instruction prefetch and/or trace p...

Compare and exchange operation using sleep-wakeup mechanism

Technique to perform three-source operations

Technique for using memory attributes

Vector completion mask handling

Instruction for enabling a processor wait state

Method and apparatus for cost and power efficient, scalable operati...

Patents Applicationslast 30 patents

PROGRAMMABLE EVENT DRIVEN YIELD MECHANISM WHICH MAY ACTIVATE OTHER...

PROGRAMMABLE EVENT DRIVEN YIELD MECHANISM WHICH MAY ACTIVATE OTHER...

SYNCHRONIZATION OF INTERRUPT PROCESSING TO REDUCE POWER CONSUMPTION

MECHANISM FOR INSTRUCTION SET BASED THREAD EXECUTION ON A PLURALITY...

METHOD AND APPARATUS FOR POWER OPTIMIZED IoT COMMUNICATION

MECHANISM FOR INSTRUCTION SET BASED THREAD EXECUTION ON A PLURALITY...

Methods And Apparatuses For Reducing Power Consumption Of Processor...

SECURING SHARED INTERCONNECT FOR VIRTUAL MACHINE

HARDWARE-ASSISTED VIRTUALIZATION FOR IMPLEMENTING SECURE VIDEO OUTP...

Instruction Set Architecture-Based Inter-Sequencer Communications W...

METHOD, APPARATUS, AND SYSTEM FOR TRANSACTIONAL SPECULATION CONTROL...

Methods And Apparatuses For Reducing Power Consumption Of Processor...

TECHNIQUE TO PERFORM THREE-SOURCE OPERATIONS

TECHNIQUE FOR USING MEMORY ATTRIBUTES

Instruction For Enabling A Processor Wait State

COMPARE AND EXCHANGE OPERATION USING SLEEP-WAKEUP MECHANISM

MECHANISM FOR INSTRUCTION SET BASED THREAD EXECUTION OF A PLURALITY...

PROGRAMMABLE EVENT DRIVEN YIELD MECHANISM WHICH MAY ACTIVATE OTHER...

INSTRUCTION SET ARCHITECTURE-BASED INTER-SEQUENCER COMMUNICATIONS W...

PRIMITIVES TO ENHANCE THREAD-LEVEL SPECULATION

MECHANISM FOR INSTRUCTION SET BASED THREAD EXECUTION ON A PLURALITY...

Vector Completion Mask Handling

METHOD AND APPARATUS FOR COST AND POWER EFFICIENT, SCALABLE OPERATI...

PRIMITIVES TO ENHANCE THREAD-LEVEL SPECULATION

Method And Apparatus For Virtualized Microcode Sequencing

TECHNIQUE FOR USING MEMORY ATTRIBUTES

Instruction For Enabling A Procesor Wait State

PRIMITIVES TO ENHANCE THREAD-LEVEL SPECULATION

METHOD AND APPARATUS FOR AFFINITY-GUIDED SPECULATIVE HELPER THREADS...

SPECULATIVE MULTI-THREADING FOR INSTRUCTION PREFETCH AND/OR TRACE P...