Peter A. Sandon

Person

Essex Jct., VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for supporting secure objects using a memory acce...
- Patent number 11,907,361
- Issue date Feb 20, 2024
- International Business Machines Corporation
- Richard Harold Boivie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing authentication protocol for merging multiple server no...
- Patent number 11,165,766
- Issue date Nov 2, 2021
- International Business Machines Corporation
- Timothy R. Block
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable array processor for pattern matching
- Patent number 10,824,953
- Issue date Nov 3, 2020
- International Business Machines Corporation
- Bulent Abali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable array processor for pattern matching
- Patent number 10,824,952
- Issue date Nov 3, 2020
- International Business Machines Corporation
- Bulent Abali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Confidential extraction of system internal data
- Patent number 9,779,258
- Issue date Oct 3, 2017
- International Business Machines Corporation
- William E. Hall
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods to save and restore a write gather pipe
- Patent number 9,189,380
- Issue date Nov 17, 2015
- International Business Machines Corporation
- Peter A. Sandon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-selected variable power integrated circuit
- Patent number 8,988,139
- Issue date Mar 24, 2015
- International Business Machines Corporation
- Nghia V. Phan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Verifying data intensive state transition machines related application
- Patent number 8,756,543
- Issue date Jun 17, 2014
- International Business Machines Corporation
- Viresh Paruthi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Model checking in state transition machine verification
- Patent number 8,397,189
- Issue date Mar 12, 2013
- International Business Machines Corporation
- Viresh Paruthi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure for hardware assisted bus state transition circuit using...
- Patent number 8,347,019
- Issue date Jan 1, 2013
- International Business Machines Corporation
- Serafino Bueti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-chip identification circuit incorporating pairs of conductors, e...
- Patent number 8,291,357
- Issue date Oct 16, 2012
- International Business Machines Corporation
- Serafino Bueti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structures for semiconductor structures with error detection and co...
- Patent number 8,146,046
- Issue date Mar 27, 2012
- International Business Machines Corporation
- Timothy Joseph Dalton
- G01 - MEASURING TESTING
Information Patent Grant
Dynamic critical path detector for digital logic circuit paths
- Patent number 8,132,136
- Issue date Mar 6, 2012
- International Business Machines Corporation
- Serafino Bueti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure for implementing dynamic refresh protocols for DRAM based...
- Patent number 8,108,609
- Issue date Jan 31, 2012
- International Business Machines Corporation
- John E. Barth
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method of computing partial CRCs
- Patent number 8,108,753
- Issue date Jan 31, 2012
- International Business Machines Corporation
- Richard E. Anderson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for implementing dynamic refresh protocols for DR...
- Patent number 8,024,513
- Issue date Sep 20, 2011
- International Business Machines Corporation
- John E. Barth, Jr.
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Three-dimensional networking design structure
- Patent number 8,019,970
- Issue date Sep 13, 2011
- International Business Machines Corporation
- Kerry Bernstein
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method of computing partial CRCS
- Patent number 7,971,122
- Issue date Jun 28, 2011
- International Business Machines Corporation
- Richard E. Anderson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for integrating SRAM and DRAM architecture in set...
- Patent number 7,962,695
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Marc R. Faucher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two dimensional addressing of a matrix-vector register array
- Patent number 7,949,853
- Issue date May 24, 2011
- International Business Machines Corporation
- Peter A. Sandon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic critical path detector for digital logic circuit paths
- Patent number 7,941,772
- Issue date May 10, 2011
- International Business Machines Corporation
- Serafino Bueti
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for obtaining a scalar value directly from a v...
- Patent number 7,908,460
- Issue date Mar 15, 2011
- Nintendo Co., Ltd.
- Yu-Chung C. Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for implementing prioritized refresh of DRAM base...
- Patent number 7,882,302
- Issue date Feb 1, 2011
- International Business Machines Corporation
- Marc R. Faucher
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Three-dimensional networking structure
- Patent number 7,865,694
- Issue date Jan 4, 2011
- International Business Machines Corporation
- Kerry Bernstein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for dynamic system-level frequency scaling
- Patent number 7,865,749
- Issue date Jan 4, 2011
- International Business Machines Corporation
- Peter A. Sandon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for obtaining a scalar value directly from a v...
- Patent number 7,739,480
- Issue date Jun 15, 2010
- Nintendo Co., Ltd.
- Yu-Chung C. Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for efficient loading and storing of vectors
- Patent number 7,581,084
- Issue date Aug 25, 2009
- Nintendo Co., Ltd.
- Yu-Chung C. Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error detection and correction in semiconductor structures
- Patent number 7,526,698
- Issue date Apr 28, 2009
- International Business Machines Corporation
- Timothy Joseph Dalton
- G01 - MEASURING TESTING
Information Patent Grant
Two dimensional addressing of a matrix-vector register array
- Patent number 7,496,731
- Issue date Feb 24, 2009
- International Business Machines Corporation
- Peter A. Sandon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of computing partial CRCs
- Patent number 7,426,674
- Issue date Sep 16, 2008
- International Business Machines Corporation
- Richard E. Anderson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD FOR SUPPORTING SECURE OBJECTS USING A MEMORY ACCE...
- Publication number 20200218799
- Publication date Jul 9, 2020
- International Business Machines Corporation
- Richard Harold Boivie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTING AUTHENTICATION PROTOCOL FOR MERGING MULTIPLE SERVER NO...
- Publication number 20200067912
- Publication date Feb 27, 2020
- International Business Machines Corporation
- Timothy R. Block
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR SUPPORTING SECURE OBJECTS USING A MEMORY ACCE...
- Publication number 20160171250
- Publication date Jun 16, 2016
- International Business Machines Corporation
- Richard Harold Boivie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIDENTIAL EXTRACTION OF SYSTEM INTERNAL DATA
- Publication number 20160125188
- Publication date May 5, 2016
- International Business Machines Corporation
- William E. HALL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE ARRAY PROCESSOR FOR PATTERN MATCHING
- Publication number 20160085720
- Publication date Mar 24, 2016
- International Business Machines Corporation
- Bulent Abali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE ARRAY PROCESSOR FOR PATTERN MATCHING
- Publication number 20160085721
- Publication date Mar 24, 2016
- International Business Machines Corporation
- Bulent Abali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS TO SAVE AND RESTORE A WRITE GATHER PIPE
- Publication number 20140359234
- Publication date Dec 4, 2014
- Peter A. SANDON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-SELECTED VARIABLE POWER INTEGRATED CIRCUIT
- Publication number 20140354333
- Publication date Dec 4, 2014
- International Business Machines Corporation
- Nghia V. Phan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODEL CHECKING IN STATE TRANSITION MACHINE VERIFICATION
- Publication number 20120278774
- Publication date Nov 1, 2012
- International Business Machines Corporation
- Viresh Paruthi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VERIFYING DATA INTENSIVE STATE TRANSITION MACHINES RELATED APPLICATION
- Publication number 20120278773
- Publication date Nov 1, 2012
- International Business Machines Corporation
- Viresh Paruthi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for obtaining a scalar value directly from a v...
- Publication number 20100217954
- Publication date Aug 26, 2010
- Nintendo Co., Ltd.,
- Yu-Chung C. Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STRUCTURE FOR IMPLEMENTING DYNAMIC REFRESH PROTOCOLS FOR DRAM BASED...
- Publication number 20090144492
- Publication date Jun 4, 2009
- International Business Machines Corporation
- John E. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR IMPLEMENTING REFRESHLESS SINGLE TRANSISTOR...
- Publication number 20090144507
- Publication date Jun 4, 2009
- International Business Machines Corporation
- John E. Barth, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR INTEGRATING SRAM AND DRAM ARCHITECTURE IN SET...
- Publication number 20090144503
- Publication date Jun 4, 2009
- Marc R. Faucher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STRUCTURE FOR IMPLEMENTING REFRESHLESS SINGLE TRANSISTOR CELL eDRAM...
- Publication number 20090144504
- Publication date Jun 4, 2009
- International Business Machines Corporation
- John E. Barth, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR IMPLEMENTING DYNAMIC REFRESH PROTOCOLS FOR DR...
- Publication number 20090144506
- Publication date Jun 4, 2009
- John E. Barth, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR IMPLEMENTING PRIORITIZED REFRESH OF DRAM BASE...
- Publication number 20090144491
- Publication date Jun 4, 2009
- Marc R. Faucher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREE-DIMENSIONAL NETWORKING DESIGN STRUCTURE
- Publication number 20090138581
- Publication date May 28, 2009
- International Business Machines Corporation
- Kerry Bernstein
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
UNIVERSAL PERIPHERAL PROCESSOR SYSTEM FOR SOC ENVIRONMENTS ON AN IN...
- Publication number 20090132732
- Publication date May 21, 2009
- International Business Machines Corporation
- Serafino Bueti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STRUCTURE FOR UNIVERSAL PERIPHERAL PROCESSOR SYSTEM FOR SOC ENVIRON...
- Publication number 20090132747
- Publication date May 21, 2009
- International Business Machines Corporation
- Serafino Bueti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DESIGN STRUCTURE FOR CHIP IDENTIFICATION SYSTEM
- Publication number 20090094566
- Publication date Apr 9, 2009
- International Business Machines Corporation
- Serafino Bueti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHIP IDENTIFICATION SYSTEM AND METHOD
- Publication number 20090091351
- Publication date Apr 9, 2009
- Serafino Bueti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DYNAMIC CRITICAL PATH DETECTOR FOR DIGITAL LOGIC CIRCUIT PATHS
- Publication number 20090044160
- Publication date Feb 12, 2009
- International Business Machines Corporation
- Serafino Bueti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC CRITICAL PATH DETECTOR FOR DIGITAL LOGIC CIRCUIT PATHS
- Publication number 20090044054
- Publication date Feb 12, 2009
- Serafino Bueti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DESIGN STRUCTURE FOR HARDWARE ASSISTED BUS STATE TRANSITION CIRCUIT...
- Publication number 20080282015
- Publication date Nov 13, 2008
- International Business Machines Corporation
- Serafino Bueti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Executing Software Within Real-Time Hardware Constraints Using Func...
- Publication number 20080282072
- Publication date Nov 13, 2008
- Todd E. Leonard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STRUCTURE FOR EXECUTING SOFTWARE WITHIN REAL-TIME HARDWARE CONSTRAI...
- Publication number 20080278195
- Publication date Nov 13, 2008
- International Business Machines Corporation
- Kenneth Goodnow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF COMPUTING PARTIAL CRCS
- Publication number 20080222488
- Publication date Sep 11, 2008
- International Business Machines Corporation
- Richard E. ANDERSON
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DESIGN STRUCTURES FOR SEMICONDUCTOR STRUCTURES WITH ERROR DETECTION...
- Publication number 20080216031
- Publication date Sep 4, 2008
- Timothy Joseph Dalton
- G01 - MEASURING TESTING
Information Patent Application
HARDWARE ASSISTED BUS STATE TRANSITION USING CONTENT ADDRESSABLE ME...
- Publication number 20080183941
- Publication date Jul 31, 2008
- International Business Machines Corporation
- Serafino Bueti
- G06 - COMPUTING CALCULATING COUNTING

Peter A. Sandon

Person

Patents Grantslast 30 patents

System and method for supporting secure objects using a memory acce...

Implementing authentication protocol for merging multiple server no...

Reconfigurable array processor for pattern matching

Reconfigurable array processor for pattern matching

Confidential extraction of system internal data

Systems and methods to save and restore a write gather pipe

Self-selected variable power integrated circuit

Verifying data intensive state transition machines related application

Model checking in state transition machine verification

Structure for hardware assisted bus state transition circuit using...

On-chip identification circuit incorporating pairs of conductors, e...

Structures for semiconductor structures with error detection and co...

Dynamic critical path detector for digital logic circuit paths

Structure for implementing dynamic refresh protocols for DRAM based...

Method of computing partial CRCs

Method and system for implementing dynamic refresh protocols for DR...

Three-dimensional networking design structure

Method of computing partial CRCS

Method and system for integrating SRAM and DRAM architecture in set...

Two dimensional addressing of a matrix-vector register array

Dynamic critical path detector for digital logic circuit paths

Method and apparatus for obtaining a scalar value directly from a v...

Method and system for implementing prioritized refresh of DRAM base...

Three-dimensional networking structure

Method and apparatus for dynamic system-level frequency scaling

Method and apparatus for obtaining a scalar value directly from a v...

Method and apparatus for efficient loading and storing of vectors

Error detection and correction in semiconductor structures

Two dimensional addressing of a matrix-vector register array

Method of computing partial CRCs

Patents Applicationslast 30 patents

SYSTEM AND METHOD FOR SUPPORTING SECURE OBJECTS USING A MEMORY ACCE...

IMPLEMENTING AUTHENTICATION PROTOCOL FOR MERGING MULTIPLE SERVER NO...

SYSTEM AND METHOD FOR SUPPORTING SECURE OBJECTS USING A MEMORY ACCE...

CONFIDENTIAL EXTRACTION OF SYSTEM INTERNAL DATA

RECONFIGURABLE ARRAY PROCESSOR FOR PATTERN MATCHING

RECONFIGURABLE ARRAY PROCESSOR FOR PATTERN MATCHING

SYSTEMS AND METHODS TO SAVE AND RESTORE A WRITE GATHER PIPE

SELF-SELECTED VARIABLE POWER INTEGRATED CIRCUIT

MODEL CHECKING IN STATE TRANSITION MACHINE VERIFICATION

VERIFYING DATA INTENSIVE STATE TRANSITION MACHINES RELATED APPLICATION

Method and apparatus for obtaining a scalar value directly from a v...

STRUCTURE FOR IMPLEMENTING DYNAMIC REFRESH PROTOCOLS FOR DRAM BASED...

APPARATUS AND METHOD FOR IMPLEMENTING REFRESHLESS SINGLE TRANSISTOR...

METHOD AND SYSTEM FOR INTEGRATING SRAM AND DRAM ARCHITECTURE IN SET...

STRUCTURE FOR IMPLEMENTING REFRESHLESS SINGLE TRANSISTOR CELL eDRAM...

METHOD AND SYSTEM FOR IMPLEMENTING DYNAMIC REFRESH PROTOCOLS FOR DR...

METHOD AND SYSTEM FOR IMPLEMENTING PRIORITIZED REFRESH OF DRAM BASE...

THREE-DIMENSIONAL NETWORKING DESIGN STRUCTURE

UNIVERSAL PERIPHERAL PROCESSOR SYSTEM FOR SOC ENVIRONMENTS ON AN IN...

STRUCTURE FOR UNIVERSAL PERIPHERAL PROCESSOR SYSTEM FOR SOC ENVIRON...

DESIGN STRUCTURE FOR CHIP IDENTIFICATION SYSTEM

CHIP IDENTIFICATION SYSTEM AND METHOD

DYNAMIC CRITICAL PATH DETECTOR FOR DIGITAL LOGIC CIRCUIT PATHS

DYNAMIC CRITICAL PATH DETECTOR FOR DIGITAL LOGIC CIRCUIT PATHS

DESIGN STRUCTURE FOR HARDWARE ASSISTED BUS STATE TRANSITION CIRCUIT...

Executing Software Within Real-Time Hardware Constraints Using Func...

STRUCTURE FOR EXECUTING SOFTWARE WITHIN REAL-TIME HARDWARE CONSTRAI...

METHOD OF COMPUTING PARTIAL CRCS

DESIGN STRUCTURES FOR SEMICONDUCTOR STRUCTURES WITH ERROR DETECTION...

HARDWARE ASSISTED BUS STATE TRANSITION USING CONTENT ADDRESSABLE ME...