Peter B. Criswell

Person

Bethel, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for expanding the instruction set of an instructi...
- Patent number 7,831,807
- Issue date Nov 9, 2010
- Unisys Corporation
- David C. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for detecting and correcting errors in a control...
- Patent number 7,451,270
- Issue date Nov 11, 2008
- Unisys Corporation
- Peter B. Criswell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual microcode RAM address mode instruction execution using operati...
- Patent number 6,654,875
- Issue date Nov 25, 2003
- Unisys Corporation
- Thomas D. Hartnett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing and string instructions for data stored on memory byte boun...
- Patent number 5,931,940
- Issue date Aug 3, 1999
- Unisys Corporation
- Richard Shelton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of using a four-state simulator for testing integrated circu...
- Patent number 5,819,072
- Issue date Oct 6, 1998
- Unisys Corporation
- Louis B. Bushard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for generating an internet protocol suite checksum in a sing...
- Patent number 5,701,316
- Issue date Dec 23, 1997
- Unisys Corporation
- Merwin H. Alferness
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for checking hardware errors
- Patent number 5,168,501
- Issue date Dec 1, 1992
- Unisys Corporation
- Peter B. Criswell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault isolation for multiphase clock signals supplied to dual modul...
- Patent number 5,081,629
- Issue date Jan 14, 1992
- Unisys Corporation
- Peter B. Criswell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for isolating failures of clear signals in instruction proce...
- Patent number 5,077,739
- Issue date Dec 31, 1991
- Unisys Corporation
- Peter B. Criswell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for checking start signals
- Patent number 4,989,172
- Issue date Jan 29, 1991
- Unisys Coporation
- Peter B. Criswell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Isolation for failures of input signals supplied to dual modules wh...
- Patent number 4,943,969
- Issue date Jul 24, 1990
- Unisys Corporation
- Peter B. Criswell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for checking duplicate logic using complementary residue cod...
- Patent number 4,924,467
- Issue date May 8, 1990
- Unisys Corporation
- Peter B. Criswell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable data reformat system
- Patent number 4,595,911
- Issue date Jun 17, 1986
- Sperry Corporation
- Glen R. Kregness
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error checked high speed shift matrix
- Patent number 4,556,978
- Issue date Dec 3, 1985
- Sperry Corporation
- Glen R. Kregness
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and a means for checking normalizing operations in a compute...
- Patent number 4,528,640
- Issue date Jul 9, 1985
- Sperry Corporation
- Peter B. Criswell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder for exponent arithmetic
- Patent number 4,366,548
- Issue date Dec 28, 1982
- Sperry Corporation
- Glen R. Kregness
- G06 - COMPUTING CALCULATING COUNTING

Peter B. Criswell

Person

Patents Grantslast 30 patents

System and method for expanding the instruction set of an instructi...

System and method for detecting and correcting errors in a control...

Dual microcode RAM address mode instruction execution using operati...

Testing and string instructions for data stored on memory byte boun...

Method of using a four-state simulator for testing integrated circu...

Method for generating an internet protocol suite checksum in a sing...

Method for checking hardware errors

Fault isolation for multiphase clock signals supplied to dual modul...

Method for isolating failures of clear signals in instruction proce...

Apparatus and method for checking start signals

Isolation for failures of input signals supplied to dual modules wh...

System for checking duplicate logic using complementary residue cod...

Programmable data reformat system

Error checked high speed shift matrix

Method and a means for checking normalizing operations in a compute...

Adder for exponent arithmetic