Peter Benjamin Sommers

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Santa Clara, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Technique for reducing voltage droop by throttling instruction issu...
- Patent number 10,241,798
- Issue date Mar 26, 2019
- NVIDIA Corporation
- Peter Sommers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Approach to reducing voltage noise in a stalled data pipeline
- Patent number 10,043,230
- Issue date Aug 7, 2018
- NVIDIA Corporation
- Philip Payman Shirvani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage droop reduction by delayed back-propagation of pipeline rea...
- Patent number 9,292,295
- Issue date Mar 22, 2016
- NVIDIA Corporation
- Philip Payman Shirvani
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
APPROACH TO REDUCING VOLTAGE NOISE IN A STALLED DATA PIPELINE
- Publication number 20150089284
- Publication date Mar 26, 2015
- NVIDIA Corporation
- Philip Payman SHIRVANI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR REDUCING VOLTAGE DROOP BY THROTTLING INSTRUCTION ISSU...
- Publication number 20150089198
- Publication date Mar 26, 2015
- NVIDIA Corporation
- Peter SOMMERS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE DROOP REDUCTION BY DELAYED BACK-PROPAGATION OF PIPELINE REA...
- Publication number 20140365750
- Publication date Dec 11, 2014
- Philip Payman Shirvani
- G06 - COMPUTING CALCULATING COUNTING