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Peter Frey
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Campbell, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Method and system providing visualization of sub-circuit iterations...
Patent number
11,144,687
Issue date
Oct 12, 2021
Xilinx, Inc.
Pramod Chandraiah
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and system for representing analog connectivity in hardware...
Patent number
7,523,424
Issue date
Apr 21, 2009
Cadence Design Systems, Inc.
Abhijeet Kolpekwar
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
System and method for communicating simulation solutions between ci...
Patent number
7,409,328
Issue date
Aug 5, 2008
Cadence Design Systems, Inc.
Bruce W. McGaughy
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
System and method for converting a flat netlist into a hierarchical...
Patent number
7,272,805
Issue date
Sep 18, 2007
Cadence Design Systems, Inc.
Bruce W. McGaughy
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
System and method for supporting multi-rate simulation of a circuit...
Patent number
7,269,541
Issue date
Sep 11, 2007
Cadence Design Systems, Inc.
Bruce W. McGaughy
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
System and method for adaptive partitioning of circuit components d...
Patent number
7,024,652
Issue date
Apr 4, 2006
Cadence Design Systems, Inc.
Bruce W. McGaughy
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
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Patent Application
Method and system for representing analog connectivity in hardware...
Publication number
20070124706
Publication date
May 31, 2007
Cadence Design Systems, Inc.
Abhijeet Kolpekwar
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
System and method for converting a flat netlist into a hierarchical...
Publication number
20060112356
Publication date
May 25, 2006
Cadence Design Systems, Inc.
Bruce W. McGaughy
G06 - COMPUTING CALCULATING COUNTING