Peter Howard Spalding

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Locking of mold compound to conductive substrate panels
- Patent number 6,963,124
- Issue date Nov 8, 2005
- National Semiconductor Corporation
- Harry Kam Cheng Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadless leadframe package design that provides a greater structura...
- Patent number 6,933,174
- Issue date Aug 23, 2005
- National Semiconductor Corporation
- Harry Kam Cheng Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadless leadframe package design that provides a greater structura...
- Patent number 6,818,970
- Issue date Nov 16, 2004
- National Semiconductor Corporation
- Harry Kam Cheng Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Locking of mold compound to conductive substrate panels
- Patent number 6,808,961
- Issue date Oct 26, 2004
- National Semiconductor Corporation
- Harry Kam Cheng Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Locking lead tips and die attach pad for a leadless package apparat...
- Patent number 6,686,652
- Issue date Feb 3, 2004
- National Semiconductor
- Jaime Bayan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadless leadframe package design that provides a greater structura...
- Patent number 6,677,667
- Issue date Jan 13, 2004
- National Semiconductor Corporation
- Harry Kam Cheng Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple row fine pitch leadless leadframe package with use of half...
- Patent number 6,674,156
- Issue date Jan 6, 2004
- National Semiconductor Corporation
- Jaime Bayan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi row leadless leadframe package
- Patent number 6,617,197
- Issue date Sep 9, 2003
- National Semiconductor Corporation
- Jaime Bayan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Locking of mold compound to conductive substrate panels
- Patent number 6,576,989
- Issue date Jun 10, 2003
- National Semiconductor Corporation
- Harry Kam Cheng Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Off-load system for semiconductor devices
- Patent number 6,551,048
- Issue date Apr 22, 2003
- National Semiconductor Corporation
- Jaime Bayan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lead frame design for burr-free singulation of molded array packages
- Patent number 6,483,180
- Issue date Nov 19, 2002
- National Semiconductor Corporation
- Jaime A. Bayan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low inductance leadless package
- Patent number 6,452,255
- Issue date Sep 17, 2002
- National Semiconductor, Corp.
- Jaime Bayan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pin indicator for leadless leadframe packages
- Patent number 6,448,107
- Issue date Sep 10, 2002
- National Semiconductor Corporation
- Harry Kam Cheng Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical isolation in panels of leadless IC packages
- Patent number 6,399,415
- Issue date Jun 4, 2002
- National Semiconductor Corporation
- Jaime Bayan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadless packaging process using a conductive substrate
- Patent number 6,372,539
- Issue date Apr 16, 2002
- National Semiconductor Corporation
- Jaime Bayan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi row leadless leadframe package
- Patent number 6,348,726
- Issue date Feb 19, 2002
- National Semiconductor Corporation
- Jaime Bayan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit leadframe incorporating overhanging leads
- Patent number 5,986,332
- Issue date Nov 16, 1999
- National Semiconductor Corporation
- Chin Seng Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lead frame incorporating material flow diverters
- Patent number 5,926,695
- Issue date Jul 20, 1999
- National Semiconductor Corporation
- Chin S. Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadframe including bendable support arms for downsetting a die att...
- Patent number 5,789,806
- Issue date Aug 4, 1998
- National Semiconductor Corporation
- Charlie Kho Chua
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Component stacking in multi-chip semiconductor packages
- Patent number 5,629,563
- Issue date May 13, 1997
- National Semiconductor Corporation
- Hem P. Takiar
- H01 - BASIC ELECTRIC ELEMENTS

Peter Howard Spalding

Person

Patents Grantslast 30 patents

Locking of mold compound to conductive substrate panels

Leadless leadframe package design that provides a greater structura...

Leadless leadframe package design that provides a greater structura...

Locking of mold compound to conductive substrate panels

Locking lead tips and die attach pad for a leadless package apparat...

Leadless leadframe package design that provides a greater structura...

Multiple row fine pitch leadless leadframe package with use of half...

Multi row leadless leadframe package

Locking of mold compound to conductive substrate panels

Off-load system for semiconductor devices

Lead frame design for burr-free singulation of molded array packages

Low inductance leadless package

Pin indicator for leadless leadframe packages

Electrical isolation in panels of leadless IC packages

Leadless packaging process using a conductive substrate

Multi row leadless leadframe package

Integrated circuit leadframe incorporating overhanging leads

Lead frame incorporating material flow diverters

Leadframe including bendable support arms for downsetting a die att...

Component stacking in multi-chip semiconductor packages