Peter K. Charvat

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Portland, OR, US

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Patents Grantslast 30 patents

Information Patent Grant
Method of patterning a layer for a gate electrode of a MOS transistor
- Patent number 6,191,016
- Issue date Feb 20, 2001
- Intel Corporation
- Robert S. Chau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via hole profile and method of fabrication
- Patent number 5,874,358
- Issue date Feb 23, 1999
- Intel Corporation
- Alan M. Myers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Anchored via connection
- Patent number 5,619,071
- Issue date Apr 8, 1997
- Intel Corporation
- Alan M. Myers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for etching silicon oxide films in a reactive ion etch syste...
- Patent number 5,549,784
- Issue date Aug 27, 1996
- Intel Corporation
- Kevin F. Carmody
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via hole profile and method of fabrication
- Patent number 5,470,790
- Issue date Nov 28, 1995
- Intel Corporation
- Alan M. Myers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polyimide process for protecting integrated circuits
- Patent number 5,242,864
- Issue date Sep 7, 1993
- Intel Corporation
- Maxine Fassberg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High CF.sub.4 flow-reactive ion etch for aluminum patterning
- Patent number 5,202,291
- Issue date Apr 13, 1993
- Intel Corporation
- Peter K. Charvat
- H01 - BASIC ELECTRIC ELEMENTS