Peter Korger

Person

Frederick, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Long path at-speed testing
- Patent number 7,065,683
- Issue date Jun 20, 2006
- LSI Logic Corporation
- David O. Sluiter
- G01 - MEASURING TESTING
Information Patent Grant
Configurable hardware register stack for CPU architectures
- Patent number 7,032,104
- Issue date Apr 18, 2006
- LSI Logic Corporation
- Peter Korger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output characterization chain for an integrated circuit
- Patent number 7,028,238
- Issue date Apr 11, 2006
- LSI Logic Corporation
- Peter Korger
- G01 - MEASURING TESTING
Information Patent Grant
Data ready indicator between different clock domains
- Patent number 6,999,542
- Issue date Feb 14, 2006
- LSI Logic Corporation
- Peter Korger
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory controller and method of aligning write data to a memory device
- Patent number 6,917,561
- Issue date Jul 12, 2005
- LSI Logic Corporation
- Robert W. Moss
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage device, system and method which can use tag bits to synchro...
- Patent number 6,880,050
- Issue date Apr 12, 2005
- LSI Logic Corporation
- Peter Korger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical linearity test for integrated circuit delay lines
- Patent number 6,798,186
- Issue date Sep 28, 2004
- LSI Logic Corporation
- Peter Korger
- G01 - MEASURING TESTING
Information Patent Grant
Methods and structure for read data synchronization with minimal la...
- Patent number 6,646,929
- Issue date Nov 11, 2003
- LSI Logic Corporation
- Robert W. Moss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for calibrating DQS qualification in a memory...
- Patent number 6,600,681
- Issue date Jul 29, 2003
- LSI Logic Corporation
- Peter Korger
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for measuring the phase of captured read data
- Patent number 6,509,762
- Issue date Jan 21, 2003
- LSI Logic Corporation
- Robert W. Moss
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for measuring the phase of captured read data
- Patent number 6,496,043
- Issue date Dec 17, 2002
- LSI Logic Corporation
- Robert W. Moss
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Physical linearity test for integrated circuit delay lines
- Publication number 20030210030
- Publication date Nov 13, 2003
- Peter Korger
- G01 - MEASURING TESTING
Information Patent Application
Memory controller and method of aligning write data to a memory device
- Publication number 20030204763
- Publication date Oct 30, 2003
- Robert W. Moss
- G11 - INFORMATION STORAGE
Information Patent Application
Input/output characterization chain for an integrated circuit
- Publication number 20030200045
- Publication date Oct 23, 2003
- Peter Korger
- G01 - MEASURING TESTING
Information Patent Application
Synchronous assert module for hardware description language library
- Publication number 20030188272
- Publication date Oct 2, 2003
- Peter Korger
- G06 - COMPUTING CALCULATING COUNTING

Peter Korger

Person

Patents Grantslast 30 patents

Long path at-speed testing

Configurable hardware register stack for CPU architectures

Input/output characterization chain for an integrated circuit

Data ready indicator between different clock domains

Memory controller and method of aligning write data to a memory device

Storage device, system and method which can use tag bits to synchro...

Physical linearity test for integrated circuit delay lines

Methods and structure for read data synchronization with minimal la...

Method and apparatus for calibrating DQS qualification in a memory...

Method and apparatus for measuring the phase of captured read data

Method and apparatus for measuring the phase of captured read data

Patents Applicationslast 30 patents

Physical linearity test for integrated circuit delay lines

Memory controller and method of aligning write data to a memory device

Input/output characterization chain for an integrated circuit

Synchronous assert module for hardware description language library