Peter McColgan

Person

Dublin, IE

People

Patents Grantslast 30 patents

Information Patent Grant
Data processing array interface having interface tiles with multipl...
- Patent number 12,164,451
- Issue date Dec 10, 2024
- Xilinx, Inc.
- David Patrick Clarke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple overlays for use with a data processing array
- Patent number 12,067,406
- Issue date Aug 20, 2024
- Xilinx, Inc.
- Baris Ozgul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple partitions in a data processing array
- Patent number 11,848,670
- Issue date Dec 19, 2023
- Xilinx, Inc.
- Juan J. Noguera Serra
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual mode interconnect
- Patent number 11,730,325
- Issue date Aug 22, 2023
- Xilinx, Inc.
- Peter McColgan
- A47 - FURNITURE DOMESTIC ARTICLES OR APPLIANCES COFFEE MILLS SPICE MILLS SUCT...
Information Patent Grant
Memory tiles in data processing engine array
- Patent number 11,520,717
- Issue date Dec 6, 2022
- Xilinx, Inc.
- David Clarke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing engines with cascade connected cores
- Patent number 11,443,091
- Issue date Sep 13, 2022
- Xilinx, Inc.
- Peter McColgan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing engine array architecture with memory tiles
- Patent number 11,336,287
- Issue date May 17, 2022
- Xilinx, Inc.
- Javier Cabezas Rodriguez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-port stream switch for stream interconnect network
- Patent number 11,323,391
- Issue date May 3, 2022
- Xilinx, Inc.
- Peter McColgan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing engine array architecture with memory tiles
- Patent number 11,296,707
- Issue date Apr 5, 2022
- Xilinx, Inc.
- Javier Cabezas Rodriguez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual mode interconnect
- Patent number 11,113,223
- Issue date Sep 7, 2021
- Xilinx, Inc.
- Peter McColgan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Streaming interconnect architecture for data processing engine array
- Patent number 10,990,552
- Issue date Apr 27, 2021
- Xilinx, Inc.
- Goran Hk Bilski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System-on-chip interface architecture
- Patent number 10,635,622
- Issue date Apr 28, 2020
- Xilinx, Inc.
- Goran H. K. Bilski
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLE PARTITIONS IN A DATA PROCESSING ARRAY
- Publication number 20240088900
- Publication date Mar 14, 2024
- Xilinx, Inc.
- Juan J. Noguera Serra
- G11 - INFORMATION STORAGE
Information Patent Application
DATA PROCESSING ARRAY INTERFACE HAVING INTERFACE TILES WITH MULTIPL...
- Publication number 20230376437
- Publication date Nov 23, 2023
- Xilinx, Inc.
- David Patrick Clarke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE PARTITIONS IN A DATA PROCESSING ARRAY
- Publication number 20230336179
- Publication date Oct 19, 2023
- Xilinx, Inc.
- Juan J. Noguera Serra
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE OVERLAYS FOR USE WITH A DATA PROCESSING ARRAY
- Publication number 20230053537
- Publication date Feb 23, 2023
- Xilinx, Inc.
- Baris Ozgul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WEIGHT SPARSITY IN DATA PROCESSING ENGINES
- Publication number 20230059970
- Publication date Feb 23, 2023
- Xilinx, Inc.
- Francisco Barat QUESADA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL MODE INTERCONNECT
- Publication number 20220015588
- Publication date Jan 20, 2022
- Xilinx, Inc.
- Peter MCCOLGAN
- A47 - FURNITURE DOMESTIC ARTICLES OR APPLIANCES COFFEE MILLS SPICE MILLS SUCT...
Information Patent Application
SYSTEM-ON-CHIP INTERFACE ARCHITECTURE
- Publication number 20190303328
- Publication date Oct 3, 2019
- Xilinx, Inc.
- Goran H.K. Balski
- G06 - COMPUTING CALCULATING COUNTING

Peter McColgan

Person

Patents Grantslast 30 patents

Data processing array interface having interface tiles with multipl...

Multiple overlays for use with a data processing array

Multiple partitions in a data processing array

Dual mode interconnect

Memory tiles in data processing engine array

Data processing engines with cascade connected cores

Data processing engine array architecture with memory tiles

Multi-port stream switch for stream interconnect network

Data processing engine array architecture with memory tiles

Dual mode interconnect

Streaming interconnect architecture for data processing engine array

System-on-chip interface architecture

Patents Applicationslast 30 patents

MULTIPLE PARTITIONS IN A DATA PROCESSING ARRAY

DATA PROCESSING ARRAY INTERFACE HAVING INTERFACE TILES WITH MULTIPL...

MULTIPLE PARTITIONS IN A DATA PROCESSING ARRAY

MULTIPLE OVERLAYS FOR USE WITH A DATA PROCESSING ARRAY

WEIGHT SPARSITY IN DATA PROCESSING ENGINES

DUAL MODE INTERCONNECT

SYSTEM-ON-CHIP INTERFACE ARCHITECTURE