Peter Naji

Person

Tempe, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for managing power consumption
- Patent number 9,176,234
- Issue date Nov 3, 2015
- QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD.
- Daniel Babitch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Resistive memory devices and related methods
- Patent number 8,773,887
- Issue date Jul 8, 2014
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for digitizing multiple channels in a receiver
- Patent number 8,514,982
- Issue date Aug 20, 2013
- CSR Technology, Inc.
- Noshir Dubash
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for managing power consumption
- Patent number 8,185,083
- Issue date May 22, 2012
- CSR Technology Inc.
- Daniel Babitch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Magnetoresistive level generator and method
- Patent number 6,829,158
- Issue date Dec 7, 2004
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Embedded MRAMs including dual read ports
- Patent number 6,609,174
- Issue date Aug 19, 2003
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
MRAM architecture and system
- Patent number 6,552,927
- Issue date Apr 22, 2003
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile magnetic register
- Patent number 6,515,895
- Issue date Feb 4, 2003
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
MRAM without isolation devices
- Patent number 6,512,689
- Issue date Jan 28, 2003
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Reference voltage generator for MRAM and method
- Patent number 6,496,436
- Issue date Dec 17, 2002
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile magnetic cache memory and method of use
- Patent number 6,452,823
- Issue date Sep 17, 2002
- Motorola, Inc.
- Peter K. Naji
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
MRAM with midpoint generator reference and method for readout
- Patent number 6,445,612
- Issue date Sep 3, 2002
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
MRAM architecture and system
- Patent number 6,418,046
- Issue date Jul 9, 2002
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetoresistive midpoint generator and method
- Patent number 6,392,923
- Issue date May 21, 2002
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Reference voltage generator for MRAM and method
- Patent number 6,385,109
- Issue date May 7, 2002
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
High density MRAM cell array
- Patent number 6,365,419
- Issue date Apr 2, 2002
- Motorola, Inc.
- Mark Durlam
- B82 - NANO-TECHNOLOGY
Information Patent Grant
MTJ MRAM series-parallel architecture
- Patent number 6,331,943
- Issue date Dec 18, 2001
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable magnetic random access memory
- Patent number 6,304,477
- Issue date Oct 16, 2001
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetic random access memory array divided into a plurality of mem...
- Patent number 6,278,631
- Issue date Aug 21, 2001
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
MTJ MRAM parallel-parallel architecture
- Patent number 6,272,041
- Issue date Aug 7, 2001
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Peak program current reduction apparatus and method
- Patent number 6,236,611
- Issue date May 22, 2001
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Current conveyor and method for readout of MTJ memories
- Patent number 6,205,073
- Issue date Mar 20, 2001
- Motorola, Inc.
- Peter Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
MTJ stacked cell memory sensing method and apparatus
- Patent number 6,169,689
- Issue date Jan 2, 2001
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetic random access memory array divided into a plurality of mem...
- Patent number 6,111,781
- Issue date Aug 29, 2000
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetic random access memory with a reference memory array
- Patent number 6,055,178
- Issue date Apr 25, 2000
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetoresistive random access memory device providing simultaneous...
- Patent number 5,986,925
- Issue date Nov 16, 1999
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetoresistive random access memory with shared word and digit lines
- Patent number 5,946,227
- Issue date Aug 31, 1999
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
High density magnetoresistive random access memory device and opera...
- Patent number 5,852,574
- Issue date Dec 22, 1998
- Motorola, Inc.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Grant
GMR device having a sense amplifier protected by a circuit for diss...
- Patent number 5,831,920
- Issue date Nov 3, 1998
- Motorola, Inc.
- Eugene Chen
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Memory Devices and Related Methods
- Publication number 20140321198
- Publication date Oct 30, 2014
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR MANAGING POWER CONSUMPTION
- Publication number 20120184236
- Publication date Jul 19, 2012
- CSR Technology Inc.
- Daniel Babitch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEMS AND METHODS FOR MANAGING POWER CONSUMPTION
- Publication number 20100248678
- Publication date Sep 30, 2010
- SIRF Technology Inc.
- Daniel Babitch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Systems and Methods for Digitizing Multiple Channels in a Receiver
- Publication number 20100150275
- Publication date Jun 17, 2010
- SiRF Technology, Inc.
- Noshir Dubash
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Magnetoresistive level generator and method
- Publication number 20030053331
- Publication date Mar 20, 2003
- MOTOROLA, INC.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Application
MRAM architecture and system
- Publication number 20020131295
- Publication date Sep 19, 2002
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Application
Reference voltage generator for MRAM and method
- Publication number 20020101767
- Publication date Aug 1, 2002
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Application
MRAM ARCHITECTURE AND SYSTEM
- Publication number 20020101760
- Publication date Aug 1, 2002
- MOTOROLA, INC.
- Peter K. Naji
- G11 - INFORMATION STORAGE
Information Patent Application
Non-volatile magnetic register
- Publication number 20020101761
- Publication date Aug 1, 2002
- MOTOROLA, INC.
- Peter K. Naji
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Systems and methods for managing power consumption

Resistive memory devices and related methods

Systems and methods for digitizing multiple channels in a receiver

Systems and methods for managing power consumption

Magnetoresistive level generator and method

Embedded MRAMs including dual read ports

MRAM architecture and system

Non-volatile magnetic register

MRAM without isolation devices

Reference voltage generator for MRAM and method

Non-volatile magnetic cache memory and method of use

MRAM with midpoint generator reference and method for readout

MRAM architecture and system

Magnetoresistive midpoint generator and method

Reference voltage generator for MRAM and method

High density MRAM cell array

MTJ MRAM series-parallel architecture

Content addressable magnetic random access memory

Magnetic random access memory array divided into a plurality of mem...

MTJ MRAM parallel-parallel architecture

Peak program current reduction apparatus and method

Current conveyor and method for readout of MTJ memories

MTJ stacked cell memory sensing method and apparatus

Magnetic random access memory array divided into a plurality of mem...

Magnetic random access memory with a reference memory array

Magnetoresistive random access memory device providing simultaneous...

Magnetoresistive random access memory with shared word and digit lines

High density magnetoresistive random access memory device and opera...

GMR device having a sense amplifier protected by a circuit for diss...

Patents Applicationslast 30 patents

Memory Devices and Related Methods

SYSTEMS AND METHODS FOR MANAGING POWER CONSUMPTION

SYSTEMS AND METHODS FOR MANAGING POWER CONSUMPTION

Systems and Methods for Digitizing Multiple Channels in a Receiver

Magnetoresistive level generator and method

MRAM architecture and system

Reference voltage generator for MRAM and method

MRAM ARCHITECTURE AND SYSTEM

Non-volatile magnetic register