Peter Nelle

Person

Munich, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor devices and processing methods
- Patent number 9,455,205
- Issue date Sep 27, 2016
- Infineon Technologies AG
- Markus Zundel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test method and test arrangement
- Patent number 9,429,616
- Issue date Aug 30, 2016
- Infineon Technologies AG
- Markus Zundel
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor device having a dense trench transistor cell array
- Patent number 9,343,565
- Issue date May 17, 2016
- Infineon Technologies AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a semiconductor device including a stress r...
- Patent number 9,218,960
- Issue date Dec 22, 2015
- Infineon Technologies AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for operating field-effect transistor, field-effect transist...
- Patent number 9,184,284
- Issue date Nov 10, 2015
- Infineon Technologies AG
- Markus Zundel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transistor cell array including semiconductor diode
- Patent number 9,165,921
- Issue date Oct 20, 2015
- Infineon Technology AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test method and test arrangement
- Patent number 9,099,419
- Issue date Aug 4, 2015
- Infineon Technologies AG
- Markus Zundel
- G01 - MEASURING TESTING
Information Patent Grant
Chip edge sealing
- Patent number 9,054,150
- Issue date Jun 9, 2015
- Infineon Technologies AG
- Markus Zundel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including a stress relief layer and method of...
- Patent number 8,803,297
- Issue date Aug 12, 2014
- Infineon Technologies AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method configured to lower thermal stresses
- Patent number 8,188,592
- Issue date May 29, 2012
- Infineon Technologies AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method configured to lower thermal stresses
- Patent number 8,021,929
- Issue date Sep 20, 2011
- Infineon Technologies AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit arrangement including a protective structure
- Patent number 7,943,960
- Issue date May 17, 2011
- Infineon Technologies AG
- Joachim Weyers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method configured to lower thermal stresses
- Patent number 7,888,782
- Issue date Feb 15, 2011
- Infineon Technologies AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical bipolar transistor
- Patent number 6,894,367
- Issue date May 17, 2005
- Infineon Technologies AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit configuration having a structure for reducing a...
- Patent number 6,800,925
- Issue date Oct 5, 2004
- Infineon Technologies AG
- Ludwig Rossmeier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal ion source and a method of producing metal ions
- Patent number 5,315,121
- Issue date May 24, 1994
- Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V.
- Andreas Kluge
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device Having a Dense Trench Transistor Cell Array
- Publication number 20160013311
- Publication date Jan 14, 2016
- INFINEON TECHNOLOGIES AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TEST METHOD AND TEST ARRANGEMENT
- Publication number 20150346270
- Publication date Dec 3, 2015
- INFINEON TECHNOLOGIES AG
- Markus Zundel
- G01 - MEASURING TESTING
Information Patent Application
Method of Manufacturing a Semiconductor Device Including a Stress R...
- Publication number 20140315391
- Publication date Oct 23, 2014
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Operating Field-Effect Transistor, Field-Effect Transist...
- Publication number 20140184306
- Publication date Jul 3, 2014
- Markus Zundel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistor Cell Array Including Semiconductor Diode
- Publication number 20140167154
- Publication date Jun 19, 2014
- INFINEON TECHNOLOGIES AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TEST METHOD AND TEST ARRANGEMENT
- Publication number 20140097863
- Publication date Apr 10, 2014
- INFINEON TECHNOLOGIES AG
- Markus Zundel
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR DEVICES AND PROCESSING METHODS
- Publication number 20140097431
- Publication date Apr 10, 2014
- INFINEON TECHNOLOGIES AG
- Markus Zundel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP EDGE SEALING
- Publication number 20140077262
- Publication date Mar 20, 2014
- INFINEON TECHNOLOGIES AG
- Markus Zundel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING A STRESS RELIEF LAYER AND METHOD OF...
- Publication number 20140042597
- Publication date Feb 13, 2014
- INFINEON TECHNOLOGIES AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD CONFIGURED TO LOWER THERMAL STRESSES
- Publication number 20120061811
- Publication date Mar 15, 2012
- INFINEON TECHNOLOGIES AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD CONFIGURED TO LOWER THERMAL STRESSES
- Publication number 20110089545
- Publication date Apr 21, 2011
- INFINEON TECHNOLOGIES AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT ARRANGEMENT INCLUDING A PROTECTIVE STRUCTURE
- Publication number 20090194843
- Publication date Aug 6, 2009
- INFINEON TECHNOLOGIES AG
- Joachim Weyers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD CONFIGURED TO LOWER THERMAL STRESSES
- Publication number 20090108421
- Publication date Apr 30, 2009
- INFINEON TECHNOLOGIES AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor element
- Publication number 20060035458
- Publication date Feb 16, 2006
- Infineon Technologies AG
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Vertical bipolar transistor
- Publication number 20030155631
- Publication date Aug 21, 2003
- Peter Nelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit configuration having a structure for reducing a...
- Publication number 20030136990
- Publication date Jul 24, 2003
- Ludwig Rossmeier
- H01 - BASIC ELECTRIC ELEMENTS

Peter Nelle

Person

Patents Grantslast 30 patents

Semiconductor devices and processing methods

Test method and test arrangement

Semiconductor device having a dense trench transistor cell array

Method of manufacturing a semiconductor device including a stress r...

Method for operating field-effect transistor, field-effect transist...

Transistor cell array including semiconductor diode

Test method and test arrangement

Chip edge sealing

Semiconductor device including a stress relief layer and method of...

Apparatus and method configured to lower thermal stresses

Apparatus and method configured to lower thermal stresses

Integrated circuit arrangement including a protective structure

Apparatus and method configured to lower thermal stresses

Vertical bipolar transistor

Integrated circuit configuration having a structure for reducing a...

Metal ion source and a method of producing metal ions

Patents Applicationslast 30 patents

Semiconductor Device Having a Dense Trench Transistor Cell Array

TEST METHOD AND TEST ARRANGEMENT

Method of Manufacturing a Semiconductor Device Including a Stress R...

Method for Operating Field-Effect Transistor, Field-Effect Transist...

Transistor Cell Array Including Semiconductor Diode

TEST METHOD AND TEST ARRANGEMENT

SEMICONDUCTOR DEVICES AND PROCESSING METHODS

CHIP EDGE SEALING

SEMICONDUCTOR DEVICE INCLUDING A STRESS RELIEF LAYER AND METHOD OF...

APPARATUS AND METHOD CONFIGURED TO LOWER THERMAL STRESSES

APPARATUS AND METHOD CONFIGURED TO LOWER THERMAL STRESSES

INTEGRATED CIRCUIT ARRANGEMENT INCLUDING A PROTECTIVE STRUCTURE

APPARATUS AND METHOD CONFIGURED TO LOWER THERMAL STRESSES

Semiconductor element

Vertical bipolar transistor

Integrated circuit configuration having a structure for reducing a...