Peter Ossimitz

Person

Muenchen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor chip having a dense arrangement of contact terminals
- Patent number 10,090,251
- Issue date Oct 2, 2018
- Infineon Technologies AG
- Peter Ossimitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-level chip interconnect
- Patent number 9,871,017
- Issue date Jan 16, 2018
- Infineon Technologies AG
- Peter Ossimitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having a chip under package
- Patent number 9,859,251
- Issue date Jan 2, 2018
- Infineon Technologies AG
- Gottfried Beer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuitry and method for monitoring a power supply of an electronic...
- Patent number 9,651,630
- Issue date May 16, 2017
- Infineon Technologies AG
- Jens Barrenscheen
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Overmolded substrate-chip arrangement with heat sink
- Patent number 9,385,059
- Issue date Jul 5, 2016
- Infineon Technologies AG
- Peter Ossimitz
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Chip package having terminal pads of different form factors
- Patent number 9,362,187
- Issue date Jun 7, 2016
- Infineon Technologies AG
- Peter Ossimitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor chip with each contact pad...
- Patent number 9,299,673
- Issue date Mar 29, 2016
- Infineon Technologies AG
- Peter Ossimitz
- G11 - INFORMATION STORAGE
Information Patent Grant
Chip arrangement, and method for forming a chip arrangement
- Patent number 9,219,031
- Issue date Dec 22, 2015
- Infineon Technologies AG
- Peter Ossimitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated IC package
- Patent number 9,204,543
- Issue date Dec 1, 2015
- Infineon Technologies AG
- Peter Ossimitz
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of manufacturing and testing a chip package
- Patent number 9,082,644
- Issue date Jul 14, 2015
- Infineon Technologies AG
- Peter Ossimitz
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor memory component having a diverting circuit
- Patent number 8,799,704
- Issue date Aug 5, 2014
- Infineon Technologies AG
- Peter Ossimitz
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor chip comprising a plurality of contact pads and a plu...
- Patent number 8,779,577
- Issue date Jul 15, 2014
- Infineon Technologies AG
- Peter Ossimitz
- G11 - INFORMATION STORAGE
Information Patent Grant
Device for releasably receiving a semiconductor chip
- Patent number 8,399,265
- Issue date Mar 19, 2013
- Infineon Technologies AG
- Peter Ossimitz
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic element comprising an electronic circuit which is to be...
- Patent number 7,640,469
- Issue date Dec 29, 2009
- Infineon Technologies AG
- Ralf Arnold
- G01 - MEASURING TESTING
Information Patent Grant
Rewiring substrate strip with several semiconductor component posit...
- Patent number 7,560,801
- Issue date Jul 14, 2009
- Infineon Technologies AG
- Peter Ossimitz
- G01 - MEASURING TESTING
Information Patent Grant
Rewiring substrate strip having a plurality of semiconductor compon...
- Patent number 7,501,701
- Issue date Mar 10, 2009
- Infineon Technologies AG
- Peter Ossimitz
- G01 - MEASURING TESTING
Information Patent Grant
Rewiring substrate strip with a number of semiconductor component p...
- Patent number 7,154,116
- Issue date Dec 26, 2006
- Infineon Technologies AG
- Gavin Gibson
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MULTI-LEVEL CHIP INTERCONNECT
- Publication number 20170194288
- Publication date Jul 6, 2017
- INFINEON TECHNOLOGIES AG
- Peter OSSIMITZ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Chip Having a Dense Arrangement of Contact Terminals
- Publication number 20170025357
- Publication date Jan 26, 2017
- INFINEON TECHNOLOGIES AG
- Peter Ossimitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device Having a Chip Under Package
- Publication number 20160225745
- Publication date Aug 4, 2016
- INFINEON TECHNOLOGIES AG
- Gottfried Beer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED IC PACKAGE
- Publication number 20150156872
- Publication date Jun 4, 2015
- INFINEON TECHNOLOGIES AG
- Peter Ossimitz
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Overmolded substrate-chip arrangement with heat sink
- Publication number 20150062825
- Publication date Mar 5, 2015
- INFINEON TECHNOLOGIES AG
- Peter Ossimitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUITRY AND METHOD FOR MONITORING A POWER SUPPLY OF AN ELECTRONIC...
- Publication number 20150022924
- Publication date Jan 22, 2015
- INFINEON TECHNOLOGIES AG
- Jens Barrenscheen
- G01 - MEASURING TESTING
Information Patent Application
CHIP ARRANGEMENT, AND METHOD FOR FORMING A CHIP ARRANGEMENT
- Publication number 20140332953
- Publication date Nov 13, 2014
- INFINEON TECHNOLOGIES AG
- Peter Ossimitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP, METHOD FOR MANUFACTURING A SEMICONDUCTOR CHIP,...
- Publication number 20140264814
- Publication date Sep 18, 2014
- INFINEON TECHNOLOGIES AG
- Peter Ossimitz
- G11 - INFORMATION STORAGE
Information Patent Application
Method of Manufacturing and Testing a Chip Package
- Publication number 20140206109
- Publication date Jul 24, 2014
- INFINEON TECHNOLOGIES AG
- Peter Ossimitz
- G01 - MEASURING TESTING
Information Patent Application
Chip Package Having Terminal Pads of Different Form Factors
- Publication number 20140203278
- Publication date Jul 24, 2014
- INFINEON TECHNOLOGIES AG
- Peter Ossimitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP, METHOD FOR MANUFACTURING A SEMICONDUCTOR CHIP,...
- Publication number 20130207254
- Publication date Aug 15, 2013
- INFINEON TECHNOLOGIES AG
- Peter Ossimitz
- G11 - INFORMATION STORAGE
Information Patent Application
Device for Releasably Receiving a Semiconductor Chip
- Publication number 20120238042
- Publication date Sep 20, 2012
- INFINEON TECHNOLOGIES AG
- Peter Ossimitz
- G01 - MEASURING TESTING
Information Patent Application
Semiconductor Memory Component Having A Diverting Circuit
- Publication number 20080016391
- Publication date Jan 17, 2008
- Peter Ossimitz
- G11 - INFORMATION STORAGE
Information Patent Application
Rewiring Substrate Strip Having a Plurality of Semiconductor Compon...
- Publication number 20070063311
- Publication date Mar 22, 2007
- Peter Ossimitz
- G01 - MEASURING TESTING
Information Patent Application
Rewiring substrates strip with several semiconductor component posi...
- Publication number 20070051984
- Publication date Mar 8, 2007
- Infineon Technologies AG
- Peter Ossimitz
- G01 - MEASURING TESTING
Information Patent Application
Electronic element comprising an electronic circuit which is to be...
- Publication number 20060190792
- Publication date Aug 24, 2006
- Ralf Arnold
- G01 - MEASURING TESTING
Information Patent Application
Rewiring substrate strip with a number of semiconductor component p...
- Publication number 20050082667
- Publication date Apr 21, 2005
- Gavin Gibson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-chip module and method for testing
- Publication number 20050086564
- Publication date Apr 21, 2005
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and method for testing semiconductor nodules on a semicon...
- Publication number 20050006726
- Publication date Jan 13, 2005
- Infineon Technologies AG
- Peter Ossimitz
- G01 - MEASURING TESTING

Peter Ossimitz

Person

Patents Grantslast 30 patents

Semiconductor chip having a dense arrangement of contact terminals

Multi-level chip interconnect

Semiconductor device having a chip under package

Circuitry and method for monitoring a power supply of an electronic...

Overmolded substrate-chip arrangement with heat sink

Chip package having terminal pads of different form factors

Method for manufacturing a semiconductor chip with each contact pad...

Chip arrangement, and method for forming a chip arrangement

Integrated IC package

Method of manufacturing and testing a chip package

Semiconductor memory component having a diverting circuit

Semiconductor chip comprising a plurality of contact pads and a plu...

Device for releasably receiving a semiconductor chip

Electronic element comprising an electronic circuit which is to be...

Rewiring substrate strip with several semiconductor component posit...

Rewiring substrate strip having a plurality of semiconductor compon...

Rewiring substrate strip with a number of semiconductor component p...

Patents Applicationslast 30 patents

MULTI-LEVEL CHIP INTERCONNECT

Semiconductor Chip Having a Dense Arrangement of Contact Terminals

Semiconductor Device Having a Chip Under Package

INTEGRATED IC PACKAGE

Overmolded substrate-chip arrangement with heat sink

CIRCUITRY AND METHOD FOR MONITORING A POWER SUPPLY OF AN ELECTRONIC...

CHIP ARRANGEMENT, AND METHOD FOR FORMING A CHIP ARRANGEMENT

SEMICONDUCTOR CHIP, METHOD FOR MANUFACTURING A SEMICONDUCTOR CHIP,...

Method of Manufacturing and Testing a Chip Package

Chip Package Having Terminal Pads of Different Form Factors

SEMICONDUCTOR CHIP, METHOD FOR MANUFACTURING A SEMICONDUCTOR CHIP,...

Device for Releasably Receiving a Semiconductor Chip

Semiconductor Memory Component Having A Diverting Circuit

Rewiring Substrate Strip Having a Plurality of Semiconductor Compon...

Rewiring substrates strip with several semiconductor component posi...

Electronic element comprising an electronic circuit which is to be...

Rewiring substrate strip with a number of semiconductor component p...

Multi-chip module and method for testing

Apparatus and method for testing semiconductor nodules on a semicon...