Peter Shaw Moldauer

Person

Wellington, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Routing vias in a substrate from bypass capacitor pads
- Patent number 7,326,860
- Issue date Feb 5, 2008
- Hewlett-Packard Development Company, L.P.
- Jerimy Nelson
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Routing power and ground vias in a substrate
- Patent number 7,327,583
- Issue date Feb 5, 2008
- Hewlett-Packard Development Company, L.P.
- Jerimy Nelson
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method and structure for external control of ESD protection in elec...
- Patent number 7,203,043
- Issue date Apr 10, 2007
- Hewlett-Packard Development Company, L.P.
- Jason Harold Culler
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Routing differential signal lines in a substrate
- Patent number 7,078,812
- Issue date Jul 18, 2006
- Hewlett-Packard Development Company, L.P.
- Mark D. Frank
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Routing vias in a substrate from bypass capacitor pads
- Patent number 7,075,185
- Issue date Jul 11, 2006
- Hewlett-Packard Development Company, L.P.
- Jerimy Nelson
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Verifying proximity of ground vias to signal vias in an integrated...
- Patent number 6,922,822
- Issue date Jul 26, 2005
- Hewlett-Packard Development Company, L.P.
- Mark D. Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Oscillator method and apparatus for a test chip
- Patent number 6,861,912
- Issue date Mar 1, 2005
- Hewlett-Packard Development Company, L.P.
- Jason H. Culler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Inter-signal proximity verification in an integrated circuit
- Patent number 6,807,657
- Issue date Oct 19, 2004
- Hewlett-Packard Development Company, L.P.
- Mark D. Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Terminating pathway for a clock signal
- Patent number 6,788,135
- Issue date Sep 7, 2004
- Hewlett-Packard Development Company, L.P.
- Lisa Ann Yunker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verifying proximity of ground metal to signal traces in an integrat...
- Patent number 6,769,102
- Issue date Jul 27, 2004
- Hewlett-Packard Development Company
- Mark D. Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synthesizing signal net information from multiple integrated circui...
- Patent number 6,711,730
- Issue date Mar 23, 2004
- Hewlett-Packard Development Company, L.P.
- Mark D. Frank
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CIRCUIT PACKAGE WITH INTEGRATED DIRECT-CURRENT (DC) BLOCKING CAPACITOR
- Publication number 20110011634
- Publication date Jan 20, 2011
- Avago Technologies Enterprise IP (Singapore )Pte. Ltd.
- Peter Moldauer
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Routing vias in a substrate from bypass capacitor pads
- Publication number 20060225916
- Publication date Oct 12, 2006
- Jerimy Nelson
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Routing vias in a substrate from bypass capacitor pads
- Publication number 20060055049
- Publication date Mar 16, 2006
- Jerimy Nelson
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Routing power and ground vias in a substrate
- Publication number 20060055022
- Publication date Mar 16, 2006
- Jerimy Nelson
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Routing differential signal lines in a substrate
- Publication number 20060043537
- Publication date Mar 2, 2006
- Mark D. Frank
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method and structure for external control of ESD protection in elec...
- Publication number 20040240129
- Publication date Dec 2, 2004
- Peter Shaw Moldauer
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
Synthesizing signal net information from multiple integrated circui...
- Publication number 20040143531
- Publication date Jul 22, 2004
- Mark D. Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Verifying proximity of ground metal to signal traces in an integrat...
- Publication number 20040015795
- Publication date Jan 22, 2004
- Mark D. Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Inter-signal proximity verification in an integrated circuit
- Publication number 20040015806
- Publication date Jan 22, 2004
- Mark D. Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Verifying proximity of ground vias to signal vias in an integrated...
- Publication number 20040015796
- Publication date Jan 22, 2004
- Mark D. Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synthesizing signal net information from multiple integrated circui...
- Publication number 20030212980
- Publication date Nov 13, 2003
- Mark D. Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Software tool for generation of scattering parameter models of N-po...
- Publication number 20030065498
- Publication date Apr 3, 2003
- Karl J. Bois
- G06 - COMPUTING CALCULATING COUNTING

Peter Shaw Moldauer

Person

Patents Grantslast 30 patents

Routing vias in a substrate from bypass capacitor pads

Routing power and ground vias in a substrate

Method and structure for external control of ESD protection in elec...

Routing differential signal lines in a substrate

Routing vias in a substrate from bypass capacitor pads

Verifying proximity of ground vias to signal vias in an integrated...

Oscillator method and apparatus for a test chip

Inter-signal proximity verification in an integrated circuit

Terminating pathway for a clock signal

Verifying proximity of ground metal to signal traces in an integrat...

Synthesizing signal net information from multiple integrated circui...

Patents Applicationslast 30 patents

CIRCUIT PACKAGE WITH INTEGRATED DIRECT-CURRENT (DC) BLOCKING CAPACITOR

Routing vias in a substrate from bypass capacitor pads

Routing vias in a substrate from bypass capacitor pads

Routing power and ground vias in a substrate

Routing differential signal lines in a substrate

Method and structure for external control of ESD protection in elec...

Synthesizing signal net information from multiple integrated circui...

Verifying proximity of ground metal to signal traces in an integrat...

Inter-signal proximity verification in an integrated circuit

Verifying proximity of ground vias to signal vias in an integrated...

Synthesizing signal net information from multiple integrated circui...

Software tool for generation of scattering parameter models of N-po...