Peter T. Freiburger

Person

Rochester, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory interface latch with integrated write-through and fence func...
- Patent number 10,916,323
- Issue date Feb 9, 2021
- International Business Machines Corporation
- Elizabeth L. Gerhard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory interface latch with integrated write-through and fence func...
- Patent number 10,381,098
- Issue date Aug 13, 2019
- International Business Machines Corporation
- Elizabeth L. Gerhard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory interface latch with integrated write-through function
- Patent number 10,229,748
- Issue date Mar 12, 2019
- International Business Machines Corporation
- Elizabeth L. Gerhard
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM local evaluation and write logic for column selection
- Patent number 9,087,563
- Issue date Jul 21, 2015
- International Business Machines Corporation
- Peter T. Freiburger
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM local evaluation logic for column selection
- Patent number 9,058,866
- Issue date Jun 16, 2015
- International Business Machines Corporation
- Peter T. Freiburger
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for selectable guaranteed write-through with early read supp...
- Patent number 8,488,368
- Issue date Jul 16, 2013
- International Business Machines Corporation
- Todd A Christensen
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing single bit redundancy for dynamic SRAM circuit with an...
- Patent number 8,427,894
- Issue date Apr 23, 2013
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Bias temperature instability-influenced storage cell
- Patent number 8,107,309
- Issue date Jan 31, 2012
- International Business Machines Corporation
- Douglas M. Dewanz
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing enhanced array access time tracking with logic built i...
- Patent number 7,925,950
- Issue date Apr 12, 2011
- International Business Machines Corporation
- Todd Alan Christensen
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing enhanced dual mode SRAM performance screen ring oscill...
- Patent number 7,835,176
- Issue date Nov 16, 2010
- International Business Machines Corporation
- Chad Allen Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing local evaluation of domino read SRAM with enhanced SRA...
- Patent number 7,724,586
- Issue date May 25, 2010
- International Business Machines Corporation
- Chad Allen Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit for implementing enhanced SRAM write and read pe...
- Patent number 7,684,263
- Issue date Mar 23, 2010
- International Business Machines Corporation
- Chad Allen Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for testing integrated circuits
- Patent number 7,681,095
- Issue date Mar 16, 2010
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for reducing wiring and required number of redundant elements
- Patent number 7,443,744
- Issue date Oct 28, 2008
- International Business Machines Corporation
- Derick Gardner Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for testing integrated circuits
- Patent number 7,418,637
- Issue date Aug 26, 2008
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic latching logic structure with static interfaces for impleme...
- Patent number 7,161,390
- Issue date Jan 9, 2007
- International Business Machines Corporation
- Anthony Gus Aipperspach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and sum addressed cell encoder for enhanced compare and sear...
- Patent number 7,035,127
- Issue date Apr 25, 2006
- International Business Machines Corporation
- Chad Allen Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulse generator circuit and semiconductor device including same
- Patent number 7,015,600
- Issue date Mar 21, 2006
- International Business Machines Corporation
- Chad Allen Adams
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Lower power and reduced device split local and continuous bitline f...
- Patent number 6,901,003
- Issue date May 31, 2005
- International Business Machines Corporation
- Chad Allen Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Split local and continuous bitline requiring fewer wires
- Patent number 6,741,493
- Issue date May 25, 2004
- International Business Machines Corporation
- Todd Alan Christensen
- G11 - INFORMATION STORAGE
Information Patent Grant
Split local and continuous bitline for fast domino read SRAM
- Patent number 6,657,886
- Issue date Dec 2, 2003
- International Business Machines Corporation
- Chad Allen Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and ring oscillator for evaluating dynamic circuits
- Patent number 6,538,522
- Issue date Mar 25, 2003
- International Business Machines Corporation
- Anthony Gus Aipperspach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast scannable output latch with domino logic input
- Patent number 6,272,654
- Issue date Aug 7, 2001
- International Business Machines Corporation
- Peter Thomas Freiburger
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for assembling array and datapath macros
- Patent number 6,247,166
- Issue date Jun 12, 2001
- International Business Machines Corporation
- Anthony Gus Aipperspach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power wordline decoder circuit with minimized hold time
- Patent number 6,172,531
- Issue date Jan 9, 2001
- International Business Machines Corporation
- Anthony Gus Aipperspach
- G11 - INFORMATION STORAGE
Information Patent Grant
Write multiplexer apparatus and method for multiple write port prog...
- Patent number 5,991,208
- Issue date Nov 23, 1999
- International Business Machines Corporation
- Anthony Gus Aipperspach
- G11 - INFORMATION STORAGE
Information Patent Grant
Global wire management apparatus and method for a multiple-port ran...
- Patent number 5,991,224
- Issue date Nov 23, 1999
- International Business Machines Corporation
- Anthony Gus Aipperspach
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY INTERFACE LATCH WITH INTEGRATED WRITE-THROUGH AND FENCE FUNC...
- Publication number 20190311777
- Publication date Oct 10, 2019
- International Business Machines Corporation
- Elizabeth L. Gerhard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY INTERFACE LATCH WITH INTEGRATED WRITE-THROUGH AND FENCE FUNC...
- Publication number 20190164623
- Publication date May 30, 2019
- International Business Machines Corporation
- Elizabeth L. Gerhard
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM LOCAL EVALUATION AND WRITE LOGIC FOR COLUMN SELECTION
- Publication number 20140063986
- Publication date Mar 6, 2014
- International Business Machines Corporation
- Peter T. Freiburger
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM LOCAL EVALUATION LOGIC FOR COLUMN SELECTION
- Publication number 20140063916
- Publication date Mar 6, 2014
- INTERNATIONAL BUSINESS MACHINES CORPORATION
- Peter T. Freiburger
- G11 - INFORMATION STORAGE
Information Patent Application
Method for Selectable Guaranteed Write-Through With Early Read Supp...
- Publication number 20120195107
- Publication date Aug 2, 2012
- International Business Machines Corporation
- Todd A. Christensen
- G11 - INFORMATION STORAGE
Information Patent Application
IMPLEMENTING SINGLE BIT REDUNDANCY FOR DYNAMIC SRAM CIRCUIT WITH AN...
- Publication number 20120069688
- Publication date Mar 22, 2012
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
Bias Temperature Instability-Influenced Storage Cell
- Publication number 20110013445
- Publication date Jan 20, 2011
- International Business Machines Corporation
- Douglas M. Dewanz
- G11 - INFORMATION STORAGE
Information Patent Application
Implementing Enhanced Array Access Time Tracking With Logic Built i...
- Publication number 20100218055
- Publication date Aug 26, 2010
- International Business Machines Corporation
- Todd Alan Christensen
- G11 - INFORMATION STORAGE
Information Patent Application
Implementing Enhanced Dual Mode SRAM Performance Screen Ring Oscill...
- Publication number 20100188888
- Publication date Jul 29, 2010
- International Business Machines Corporation
- Chad Allen Adams
- G11 - INFORMATION STORAGE
Information Patent Application
Implementing Local Evaluation of Domino Read SRAM With Enhanced SRA...
- Publication number 20100046278
- Publication date Feb 25, 2010
- International Business Machines Corporation
- Chad Allen Adams
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Circuit for Implementing Enhanced SRAM Write and Read Pe...
- Publication number 20090185435
- Publication date Jul 23, 2009
- Chad Allen Adams
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Selectable Guaranteed Write Through
- Publication number 20090122626
- Publication date May 14, 2009
- Peter T. Freiburger
- G11 - INFORMATION STORAGE
Information Patent Application
ENHANCED SRAM REDUNDANCY CIRCUIT FOR REDUCING WIRING AND REQUIRED N...
- Publication number 20080273406
- Publication date Nov 6, 2008
- International Business Machines Corporation
- Derick Gardner Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS FOR TESTING INTEGRATED CIRCUITS
- Publication number 20080266985
- Publication date Oct 30, 2008
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Enhanced SRAM Redundancy Circuit for Reducing Wiring and...
- Publication number 20080112219
- Publication date May 15, 2008
- International Business Machines Corporation
- Derick Gardner Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Enhanced SRAM Redundancy Circuit for Reducing Wiring and...
- Publication number 20080112237
- Publication date May 15, 2008
- Derick Gardner Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for implementing power saving for content addr...
- Publication number 20070047282
- Publication date Mar 1, 2007
- International Business Machines Corporation
- Derick Gardner Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SUM ADDRESSED CELL ENCODER FOR ENHANCED COMPARE AND SEAR...
- Publication number 20060087873
- Publication date Apr 27, 2006
- International Business Machines Corporation
- Chad Allen Adams
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic latching logic structure with static interfaces for impleme...
- Publication number 20060044020
- Publication date Mar 2, 2006
- International Business Machines Corporation
- Anthony Gus Aipperspach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Methods and apparatus for writing an LRU bit
- Publication number 20050125615
- Publication date Jun 9, 2005
- International Business Machines Corporation
- Peter T. Freiburger
- G11 - INFORMATION STORAGE
Information Patent Application
Methods and apparatus for testing integrated circuits
- Publication number 20050034037
- Publication date Feb 10, 2005
- International Business Machines Corporation,
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
Lower power and reduced device split local and continuous bitline f...
- Publication number 20050007813
- Publication date Jan 13, 2005
- International Business Machines Corporation
- Chad Allen Adams
- G11 - INFORMATION STORAGE
Information Patent Application
SPLIT LOCAL AND CONTINUOUS BITLINE REQUIRING FEWER WIRES
- Publication number 20040090817
- Publication date May 13, 2004
- International Business Machines Corporation
- Todd Alan Christensen
- G11 - INFORMATION STORAGE
Information Patent Application
Pulse generator circuit and semiconductor device including same
- Publication number 20040070433
- Publication date Apr 15, 2004
- International Business Machines Corporation
- Chad Allen Adams
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SPLIT LOCAL AND CONTINUOUS BITLINE FOR FAST DOMINO READ SRAM
- Publication number 20030210565
- Publication date Nov 13, 2003
- International Business Machines Corporation
- Chad Allen Adams
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND RING OSCILLATOR FOR EVALUATING DYNAMIC CIRCUITS
- Publication number 20030071692
- Publication date Apr 17, 2003
- International Business Machines Corporation
- Anthony Gus Aipperspach
- H03 - BASIC ELECTRONIC CIRCUITRY

Peter T. Freiburger

Person

Patents Grantslast 30 patents

Memory interface latch with integrated write-through and fence func...

Memory interface latch with integrated write-through and fence func...

Memory interface latch with integrated write-through function

SRAM local evaluation and write logic for column selection

SRAM local evaluation logic for column selection

Method for selectable guaranteed write-through with early read supp...

Implementing single bit redundancy for dynamic SRAM circuit with an...

Bias temperature instability-influenced storage cell

Implementing enhanced array access time tracking with logic built i...

Implementing enhanced dual mode SRAM performance screen ring oscill...

Implementing local evaluation of domino read SRAM with enhanced SRA...

Method and circuit for implementing enhanced SRAM write and read pe...

Methods and apparatus for testing integrated circuits

Method for reducing wiring and required number of redundant elements

Methods and apparatus for testing integrated circuits

Dynamic latching logic structure with static interfaces for impleme...

Method and sum addressed cell encoder for enhanced compare and sear...

Pulse generator circuit and semiconductor device including same

Lower power and reduced device split local and continuous bitline f...

Split local and continuous bitline requiring fewer wires

Split local and continuous bitline for fast domino read SRAM

Method and ring oscillator for evaluating dynamic circuits

Fast scannable output latch with domino logic input

Method and apparatus for assembling array and datapath macros

Low power wordline decoder circuit with minimized hold time

Write multiplexer apparatus and method for multiple write port prog...

Global wire management apparatus and method for a multiple-port ran...

Patents Applicationslast 30 patents

MEMORY INTERFACE LATCH WITH INTEGRATED WRITE-THROUGH AND FENCE FUNC...

MEMORY INTERFACE LATCH WITH INTEGRATED WRITE-THROUGH AND FENCE FUNC...

SRAM LOCAL EVALUATION AND WRITE LOGIC FOR COLUMN SELECTION

SRAM LOCAL EVALUATION LOGIC FOR COLUMN SELECTION

Method for Selectable Guaranteed Write-Through With Early Read Supp...

IMPLEMENTING SINGLE BIT REDUNDANCY FOR DYNAMIC SRAM CIRCUIT WITH AN...

Bias Temperature Instability-Influenced Storage Cell

Implementing Enhanced Array Access Time Tracking With Logic Built i...

Implementing Enhanced Dual Mode SRAM Performance Screen Ring Oscill...

Implementing Local Evaluation of Domino Read SRAM With Enhanced SRA...

Method and Circuit for Implementing Enhanced SRAM Write and Read Pe...

Method and Apparatus for Selectable Guaranteed Write Through

ENHANCED SRAM REDUNDANCY CIRCUIT FOR REDUCING WIRING AND REQUIRED N...

METHODS AND APPARATUS FOR TESTING INTEGRATED CIRCUITS

Method and Enhanced SRAM Redundancy Circuit for Reducing Wiring and...

Method and Enhanced SRAM Redundancy Circuit for Reducing Wiring and...

Method and apparatus for implementing power saving for content addr...

METHOD AND SUM ADDRESSED CELL ENCODER FOR ENHANCED COMPARE AND SEAR...

Dynamic latching logic structure with static interfaces for impleme...

Methods and apparatus for writing an LRU bit

Methods and apparatus for testing integrated circuits

Lower power and reduced device split local and continuous bitline f...

SPLIT LOCAL AND CONTINUOUS BITLINE REQUIRING FEWER WIRES

Pulse generator circuit and semiconductor device including same

SPLIT LOCAL AND CONTINUOUS BITLINE FOR FAST DOMINO READ SRAM

METHOD AND RING OSCILLATOR FOR EVALUATING DYNAMIC CIRCUITS