Peter Vlasenko

Person

Kanata, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Circuit for clamping current in a charge pump
- Patent number 10,199,933
- Issue date Feb 5, 2019
- Conversant Intellectual Property Management Inc.
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wide frequency range delay locked loop
- Patent number 10,122,369
- Issue date Nov 6, 2018
- Conversant Intellectual Property Management Inc.
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for clamping current in a charge pump
- Patent number 9,917,511
- Issue date Mar 13, 2018
- Conversant Intellectual Property Management Inc.
- Peter Vlasenko
- G05 - CONTROLLING REGULATING
Information Patent Grant
Circuit for clamping current in a charge pump
- Patent number 9,762,120
- Issue date Sep 12, 2017
- Conversant Intellectual Property Management Inc.
- Peter Vlasenko
- G05 - CONTROLLING REGULATING
Information Patent Grant
Circuit for clamping current in a charge pump
- Patent number 9,360,878
- Issue date Jun 7, 2016
- Conversant Intellectual Property Management Inc.
- Peter Vlasenko
- G05 - CONTROLLING REGULATING
Information Patent Grant
Circuit for clamping current in a charge pump
- Patent number 8,860,480
- Issue date Oct 14, 2014
- Conversant Intellectual Property Management Inc.
- Peter Vlasenko
- G05 - CONTROLLING REGULATING
Information Patent Grant
Delay locked loop circuit and method
- Patent number 8,704,569
- Issue date Apr 22, 2014
- MOSAID Technologies Incorporated
- Dieter Haerle
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wide frequency range delay locked loop
- Patent number 8,599,984
- Issue date Dec 3, 2013
- MOSAID Technologies Incorporated
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for clamping current in a charge pump
- Patent number 8,456,208
- Issue date Jun 4, 2013
- MOSAID Technologies Incorporated
- Peter Vlasenko
- G05 - CONTROLLING REGULATING
Information Patent Grant
Wide frequency range delay locked loop
- Patent number 8,411,812
- Issue date Apr 2, 2013
- MOSAID Technologies Incorporated
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay locked loop circuit and method
- Patent number RE43947
- Issue date Jan 29, 2013
- MOSAID Technologies Incorporated
- Dieter Haerle
- 327 - Miscellaneous active electrical nonlinear devices, circuits, and systems
Information Patent Grant
Voltage level shifter and buffer using same
- Patent number 8,324,954
- Issue date Dec 4, 2012
- Mosaid Technologies Incorporated
- Peter A. Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power up circuit with low power sleep mode operation
- Patent number 8,222,930
- Issue date Jul 17, 2012
- MOSAID Technologies Incorporated
- Hong Beom Pyeon
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Wide frequency range delay locked loop
- Patent number 8,213,561
- Issue date Jul 3, 2012
- MOSAID Technologies Incorporated
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for clamping current in a charge pump
- Patent number 8,149,032
- Issue date Apr 3, 2012
- MOSAID Technologies Incorporated
- Peter Vlasenko
- G05 - CONTROLLING REGULATING
Information Patent Grant
Bias generator providing for low power, self-biased delay element a...
- Patent number 8,125,256
- Issue date Feb 28, 2012
- Research In Motion Limited
- Peter A. Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wide frequency range delay locked loop
- Patent number 8,000,430
- Issue date Aug 16, 2011
- MOSAID Technologies Incorporated
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bias generator providing for low power, self-biased delay element a...
- Patent number 7,977,985
- Issue date Jul 12, 2011
- MOSAID Technologies Incorporated
- Peter A. Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for clamping current in a charge pump
- Patent number 7,915,933
- Issue date Mar 29, 2011
- Mosaid Technologies Incorporated
- Peter Vlasenko
- G05 - CONTROLLING REGULATING
Information Patent Grant
Voltage level shifter and buffer using same
- Patent number 7,679,418
- Issue date Mar 16, 2010
- MOSAID Technologies Incorporated
- Peter A. Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power up circuit with low power sleep mode operation
- Patent number 7,602,222
- Issue date Oct 13, 2009
- MOSAID Technologies Incorporated
- Hong Beom Pyeon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay locked loop circuit and method
- Patent number 7,532,050
- Issue date May 12, 2009
- Mosaid Technologies, Inc.
- Dieter Haerle
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wide frequency range delay locked loop
- Patent number 7,336,752
- Issue date Feb 26, 2008
- MOSAID Technologies Inc.
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay locked loop circuit and method
- Patent number 7,285,997
- Issue date Oct 23, 2007
- Mosaid Technologies, Inc.
- Dieter Haerle
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for initializing a delay locked loop
- Patent number 7,190,201
- Issue date Mar 13, 2007
- Mosaid Technologies, Inc.
- Dieter Haerle
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Matchline sensing for content addressable memories
- Patent number 6,717,876
- Issue date Apr 6, 2004
- Mosaid Technologies Incorporated
- Peter Vlasenko
- G11 - INFORMATION STORAGE
Information Patent Grant
Column redundancy for content addressable memory
- Patent number 6,665,220
- Issue date Dec 16, 2003
- Mosaid Technologies Incorporated
- Peter Vlasenko
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power content addressable memory architecture
- Patent number 6,584,003
- Issue date Jun 24, 2003
- Mosaid Technologies Incorporated
- Jin-Ki Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy selection circuit for semiconductor memories
- Patent number 6,144,591
- Issue date Nov 7, 2000
- Mosaid Technologies Incorporated
- Peter Vlasenko
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CIRCUIT FOR CLAMPING CURRENT IN A CHARGE PUMP
- Publication number 20180331620
- Publication date Nov 15, 2018
- Conversant Intellectual Property Management Inc.
- Peter Vlasenko
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
CIRCUIT FOR CLAMPING CURRENT IN A CHARGE PUMP
- Publication number 20180026529
- Publication date Jan 25, 2018
- Peter Vlasenko
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
Wide Frequency Range Delay Locked Loop
- Publication number 20170272085
- Publication date Sep 21, 2017
- Conversant Intellectual Property Management Inc.
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CIRCUIT FOR CLAMPING CURRENT IN A CHARGE PUMP
- Publication number 20160359408
- Publication date Dec 8, 2016
- Conversant Intellectual Property Management Inc.
- Peter Vlasenko
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
Circuit for Clamping Current in a Charge Pump
- Publication number 20150028939
- Publication date Jan 29, 2015
- Conversant Intellectual Property Management Inc.
- Peter Vlasenko
- G05 - CONTROLLING REGULATING
Information Patent Application
Delay Locked Loop Circuit and Method
- Publication number 20140225651
- Publication date Aug 14, 2014
- Conversant Intellectual Property Management Inc.
- Dieter Haerle
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Wide Frequency Range Delay Locked Loop
- Publication number 20140084977
- Publication date Mar 27, 2014
- MOSAID TECHNOLOGIES INCORPORATED
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
WIDE FREQUENCY RANGE DELAY LOCKED LOOP
- Publication number 20130271192
- Publication date Oct 17, 2013
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Circuit for Clamping Current in a Charge Pump
- Publication number 20130234787
- Publication date Sep 12, 2013
- Mosaid Technologies, Inc.
- Peter Vlasenko
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
Delay Locked Loop Circuit and Method
- Publication number 20130176061
- Publication date Jul 11, 2013
- MOSAID TECHNOLOGIES INCORPORATED
- Dieter Haerle
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
WIDE FREQUENCY RANGE DELAY LOCKED LOOP
- Publication number 20130003483
- Publication date Jan 3, 2013
- MOSAID TECHNOLOGIES INCORPORATED
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Circuit for Clamping Current in a Charge Pump
- Publication number 20120212267
- Publication date Aug 23, 2012
- Mosaid Technologies Incorporated
- Peter Vlasenko
- G05 - CONTROLLING REGULATING
Information Patent Application
Wide Frequency Range Delay Locked Loop
- Publication number 20110291721
- Publication date Dec 1, 2011
- MOSAID TECHNOLOGIES INCORPORATED
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BIAS GENERATOR PROVIDING FOR LOW POWER, SELF-BIASED DELAY ELEMENT A...
- Publication number 20110234308
- Publication date Sep 29, 2011
- MOSAID Technologies Incorporated
- Peter A. Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Circuit for Clamping Current in a Charge Pump
- Publication number 20110204939
- Publication date Aug 25, 2011
- MOSAID TECHNOLOGIES INCORPORATED
- Peter Vlasenko
- G05 - CONTROLLING REGULATING
Information Patent Application
VOLTAGE LEVEL SHIFTER AND BUFFER USING SAME
- Publication number 20100117709
- Publication date May 13, 2010
- MOSAID TECHNOLOGIES INCORPORATED
- Peter A. Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BIAS GENERATOR PROVIDING FOR LOW POWER, SELF-BIASED DELAY ELEMENT A...
- Publication number 20100060347
- Publication date Mar 11, 2010
- MOSAID Technologies Incorporated
- Peter A. Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
POWER UP CIRCUIT WITH LOW POWER SLEEP MODE OPERATION
- Publication number 20090315591
- Publication date Dec 24, 2009
- MOSAID TECHNOLOGIES INCORPORATED
- Hong-Beom Pyeon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIAS GENERATOR PROVIDING FOR LOW POWER, SELF-BIASED DELAY ELEMENT A...
- Publication number 20080309386
- Publication date Dec 18, 2008
- MOSAID Technologies Incorporated
- Peter A. Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
VOLTAGE LEVEL SHIFTER AND BUFFER USING SAME
- Publication number 20080265970
- Publication date Oct 30, 2008
- MOSAID Technologies Incorporated
- Peter A. Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Circuit for clamping current in a charge pump
- Publication number 20080130177
- Publication date Jun 5, 2008
- MOSAID TECHNOLOGIES, INCORPORATED
- Peter Vlasenko
- G05 - CONTROLLING REGULATING
Information Patent Application
Wide frequency range delay locked loop
- Publication number 20080089459
- Publication date Apr 17, 2008
- MOSAID Technologies, Inc.
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Delay locked loop circuit and method
- Publication number 20080030247
- Publication date Feb 7, 2008
- Dieter Haerle
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Delay locked loop circuit and method
- Publication number 20070120587
- Publication date May 31, 2007
- Dieter Haerle
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Power up circuit with low power sleep mode operation
- Publication number 20070079147
- Publication date Apr 5, 2007
- Mosaid Technologies Incorporated
- Hong-Beom Pyeon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for initializing a delay locked loop
- Publication number 20060170471
- Publication date Aug 3, 2006
- MOSAID Technologies, Inc.
- Dieter Haerle
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Wide frequency range delay locked loop
- Publication number 20040125905
- Publication date Jul 1, 2004
- MOSAID Technologies, Inc.
- Peter Vlasenko
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Matchline sensing for content addressable memories
- Publication number 20030137890
- Publication date Jul 24, 2003
- Peter Vlasenko
- G11 - INFORMATION STORAGE
Information Patent Application
Column redundancy for content addressable memory
- Publication number 20030081464
- Publication date May 1, 2003
- Peter Vlasenko
- G11 - INFORMATION STORAGE

Peter Vlasenko

Person

Patents Grantslast 30 patents

Circuit for clamping current in a charge pump

Wide frequency range delay locked loop

Circuit for clamping current in a charge pump

Circuit for clamping current in a charge pump

Circuit for clamping current in a charge pump

Circuit for clamping current in a charge pump

Delay locked loop circuit and method

Wide frequency range delay locked loop

Circuit for clamping current in a charge pump

Wide frequency range delay locked loop

Delay locked loop circuit and method

Voltage level shifter and buffer using same

Power up circuit with low power sleep mode operation

Wide frequency range delay locked loop

Circuit for clamping current in a charge pump

Bias generator providing for low power, self-biased delay element a...

Wide frequency range delay locked loop

Bias generator providing for low power, self-biased delay element a...

Circuit for clamping current in a charge pump

Voltage level shifter and buffer using same

Power up circuit with low power sleep mode operation

Delay locked loop circuit and method

Wide frequency range delay locked loop

Delay locked loop circuit and method

Method and apparatus for initializing a delay locked loop

Matchline sensing for content addressable memories

Column redundancy for content addressable memory

Low power content addressable memory architecture

Redundancy selection circuit for semiconductor memories

Patents Applicationslast 30 patents

CIRCUIT FOR CLAMPING CURRENT IN A CHARGE PUMP

CIRCUIT FOR CLAMPING CURRENT IN A CHARGE PUMP

Wide Frequency Range Delay Locked Loop

CIRCUIT FOR CLAMPING CURRENT IN A CHARGE PUMP

Circuit for Clamping Current in a Charge Pump

Delay Locked Loop Circuit and Method

Wide Frequency Range Delay Locked Loop

WIDE FREQUENCY RANGE DELAY LOCKED LOOP

Circuit for Clamping Current in a Charge Pump

Delay Locked Loop Circuit and Method

WIDE FREQUENCY RANGE DELAY LOCKED LOOP

Circuit for Clamping Current in a Charge Pump

Wide Frequency Range Delay Locked Loop

BIAS GENERATOR PROVIDING FOR LOW POWER, SELF-BIASED DELAY ELEMENT A...

Circuit for Clamping Current in a Charge Pump

VOLTAGE LEVEL SHIFTER AND BUFFER USING SAME

BIAS GENERATOR PROVIDING FOR LOW POWER, SELF-BIASED DELAY ELEMENT A...

POWER UP CIRCUIT WITH LOW POWER SLEEP MODE OPERATION

BIAS GENERATOR PROVIDING FOR LOW POWER, SELF-BIASED DELAY ELEMENT A...

VOLTAGE LEVEL SHIFTER AND BUFFER USING SAME

Circuit for clamping current in a charge pump

Wide frequency range delay locked loop

Delay locked loop circuit and method

Delay locked loop circuit and method

Power up circuit with low power sleep mode operation

Method and apparatus for initializing a delay locked loop

Wide frequency range delay locked loop

Matchline sensing for content addressable memories

Column redundancy for content addressable memory