Peter Voigt

Person

Hallbergmoos, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Buried strap contact for a storage capacitor and method for fabrica...
- Patent number 7,163,857
- Issue date Jan 16, 2007
- Infineon Technologies AG
- Peter Voigt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a gate structure of a FET and gate structure...
- Patent number 7,081,392
- Issue date Jul 25, 2006
- Infineon Technologies AG
- Gerhard Enders
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor gate structure and method for fabricating a semicondu...
- Patent number 7,045,422
- Issue date May 16, 2006
- Infineon Technologies AG
- Gerhard Enders
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical transistor, and a method for producing a vertical transistor
- Patent number 7,034,358
- Issue date Apr 25, 2006
- Infineon Technologies AG
- Dietrich Bonart
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field-effect transistor
- Patent number 7,009,263
- Issue date Mar 7, 2006
- Infineon Technologies AG
- Gerhard Enders
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a vertical transistor, and semiconductor mem...
- Patent number 6,838,335
- Issue date Jan 4, 2005
- Infineon Technologies AG
- Dietrich Bonart
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench cell for a DRAM cell array
- Patent number 6,822,281
- Issue date Nov 23, 2004
- Infineon Technologies AG
- Peter Voigt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a buried strap contact in a memory cell
- Patent number 6,797,562
- Issue date Sep 28, 2004
- Infineon Technologies AG
- Dietrich Bonart
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a diffusion region
- Patent number 6,696,335
- Issue date Feb 24, 2004
- Infineon Technologies AG
- Dietrich Bonart
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor memory cell array having self-aligned recessed gate M...
- Publication number 20070040202
- Publication date Feb 22, 2007
- Infineon Technologies AG
- Gerhard Enders
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Buried strap contact for a storage capacitor and method for fabrica...
- Publication number 20070002691
- Publication date Jan 4, 2007
- Peter Voigt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for producing a vertical transistor
- Publication number 20060148178
- Publication date Jul 6, 2006
- Infineon Technologies AG
- Dietrich Bonart
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating a gate structure of a FET and gate structure...
- Publication number 20050085043
- Publication date Apr 21, 2005
- Infineon Technologies AG
- Gerhard Enders
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Buried strap contact for a storage capacitor and method for fabrica...
- Publication number 20050026359
- Publication date Feb 3, 2005
- Infineon Technologies AG
- Peter Voigt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor gate structure and method for fabricating a semicondu...
- Publication number 20040262697
- Publication date Dec 30, 2004
- INFINEON TECHNOLOGIES
- Gerhard Enders
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Field-effect transistor
- Publication number 20040245576
- Publication date Dec 9, 2004
- Gerhard Enders
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for manufacturing a buried strap contact in a memory cell
- Publication number 20040048436
- Publication date Mar 11, 2004
- Dietrich Bonart
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating a vertical transistor, and semiconductor mem...
- Publication number 20040021163
- Publication date Feb 5, 2004
- Dietrich Bonart
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Vertical transistor, and a method for producing a vertical transistor
- Publication number 20040005762
- Publication date Jan 8, 2004
- Dietrich Bonart
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Trench cell for a DRAM cell array
- Publication number 20030178662
- Publication date Sep 25, 2003
- Peter Voigt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming a diffusion region
- Publication number 20030060029
- Publication date Mar 27, 2003
- Dietrich Bonart
- H01 - BASIC ELECTRIC ELEMENTS

Peter Voigt

Person

Patents Grantslast 30 patents

Buried strap contact for a storage capacitor and method for fabrica...

Method for fabricating a gate structure of a FET and gate structure...

Semiconductor gate structure and method for fabricating a semicondu...

Vertical transistor, and a method for producing a vertical transistor

Field-effect transistor

Method for fabricating a vertical transistor, and semiconductor mem...

Trench cell for a DRAM cell array

Method for manufacturing a buried strap contact in a memory cell

Method for forming a diffusion region

Patents Applicationslast 30 patents

Semiconductor memory cell array having self-aligned recessed gate M...

Buried strap contact for a storage capacitor and method for fabrica...

Method for producing a vertical transistor

Method for fabricating a gate structure of a FET and gate structure...

Buried strap contact for a storage capacitor and method for fabrica...

Semiconductor gate structure and method for fabricating a semicondu...

Field-effect transistor

Method for manufacturing a buried strap contact in a memory cell

Method for fabricating a vertical transistor, and semiconductor mem...

Vertical transistor, and a method for producing a vertical transistor

Trench cell for a DRAM cell array

Method for forming a diffusion region