Peter William Cook

Person

Bedford Corners, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Adaptive issue queue for reduced power at high performance
- Patent number 7,865,747
- Issue date Jan 4, 2011
- International Business Machines Corporation
- Alper Buyuktosunoglu
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Interlocked synchronous pipeline clock gating
- Patent number 7,685,457
- Issue date Mar 23, 2010
- International Business Machines Corporation
- Hans M. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of stalling one or more stages in an interlocked synchronous...
- Patent number 7,475,227
- Issue date Jan 6, 2009
- International Business Machines Corporation
- Hans M. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interlocked synchronous pipeline clock gating
- Patent number 7,308,593
- Issue date Dec 11, 2007
- International Business Machines Corporation
- Hans M. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with low overhead predictive supply voltage gating for le...
- Patent number 7,134,028
- Issue date Nov 7, 2006
- International Business Machines Corporation
- Pradip Bose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with demand-driven clock throttling power reduction
- Patent number 7,076,681
- Issue date Jul 11, 2006
- International Business Machines Corporation
- Pradip Bose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interlocked synchronous pipeline clock gating
- Patent number 7,065,665
- Issue date Jun 20, 2006
- International Business Machines Corporation
- Hans M. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of reducing leakage current in sub one volt SOI circuits
- Patent number 6,952,113
- Issue date Oct 4, 2005
- International Business Machines Corp.
- Richard B. Brown
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and structure for short range leakage control in pipelined c...
- Patent number 6,946,869
- Issue date Sep 20, 2005
- International Business Machines Corporation
- Hans M. Jacobson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Asynchronous pipeline control interface using tag values to control...
- Patent number 6,925,549
- Issue date Aug 2, 2005
- International Business Machines Corporation
- Peter William Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronous to asynchronous to synchronous interface
- Patent number 6,848,060
- Issue date Jan 25, 2005
- International Business Machines Corporation
- Peter W. Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latch structure for interlocked pipelined CMOS (IPCMOS) circuits
- Patent number 6,829,716
- Issue date Dec 7, 2004
- International Business Machines Corporation
- Peter W. Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-power circuit structures and methods for content addressable me...
- Patent number 6,608,771
- Issue date Aug 19, 2003
- International Business Machines Corporation
- Hans M. Jacobson
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit structures and methods for high-speed low-power select arbi...
- Patent number 6,512,397
- Issue date Jan 28, 2003
- International Business Machines Corporation
- Hans M. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interlocked pipelined CMOS
- Patent number 6,182,233
- Issue date Jan 30, 2001
- International Business Machines Corporation
- Stanley Everett Schuster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of clock routing for semiconductor chips
- Patent number 6,006,025
- Issue date Dec 21, 1999
- International Business Machines Corporation
- Peter William Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
IC chips including ALUs and identical register files whereby a numb...
- Patent number 5,301,340
- Issue date Apr 5, 1994
- International Business Machines Corporation
- Peter W. Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CMOS and ECL logic circuit requiring no interface circuitry
- Patent number 5,148,059
- Issue date Sep 15, 1992
- International Business Machines Corporation
- Chih-Liang Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for determining if there is a loss of data during a shift...
- Patent number 4,931,970
- Issue date Jun 5, 1990
- International Business Machines Corporation
- Peter W. Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial decode shifter/rotator
- Patent number 4,931,971
- Issue date Jun 5, 1990
- International Business Machines Corporation
- Peter W. Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Carry lookahead logical mechanism using affirmatively referenced tr...
- Patent number 4,504,924
- Issue date Mar 12, 1985
- International Business Machines Corporation
- Peter W. Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Avoidance of hot electron operation of voltage stressed bootstrap d...
- Patent number 4,199,695
- Issue date Apr 22, 1980
- International Business Machines Corporation
- Peter W. Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Comparator circuit for a C-2C A/D and D/A converter
- Patent number 4,097,753
- Issue date Jun 27, 1978
- International Business Machines Corporation
- Peter William Cook
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
A/D and D/A converter using C-2C ladder network
- Patent number 4,028,694
- Issue date Jun 7, 1977
- International Business Machines Corporation
- Peter William Cook
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND STRUCTURE FOR IMPLEMENTING B2B TRADING PARTNER BOARDING
- Publication number 20100004970
- Publication date Jan 7, 2010
- International Business Machines Corporation
- Didier Boullery
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERLOCKED SYNCHRONOUS PIPELINE CLOCK GATING
- Publication number 20070294548
- Publication date Dec 20, 2007
- International Business Machines Corperation
- Hans M. JACOBSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interlocked synchronous pipeline clock gating
- Publication number 20060161795
- Publication date Jul 20, 2006
- Hans M. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interlocked synchronous pipeline clock gating
- Publication number 20060156046
- Publication date Jul 13, 2006
- Hans M. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and structure for implementing B2B trading partner boarding
- Publication number 20060095275
- Publication date May 4, 2006
- International Business Machines Corporation
- Didier Boullery
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and structure for short range leakage control in pipelined c...
- Publication number 20050083081
- Publication date Apr 21, 2005
- Hans M. Jacobson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method of reducing leakage current in sub one volt SOI circuits
- Publication number 20050040881
- Publication date Feb 24, 2005
- Richard B. Brown
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Processor with low overhead predictive supply voltage gating for le...
- Publication number 20040221185
- Publication date Nov 4, 2004
- International Business Machines Corporation
- Pradip Bose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interlocked synchronous pipeline clock gating
- Publication number 20040068640
- Publication date Apr 8, 2004
- International Business Machines Corporation
- Hans M. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with demand-driven clock throttling power reduction
- Publication number 20040044915
- Publication date Mar 4, 2004
- International Business Machines Corportation
- Pradip Bose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW-POWER CIRCUIT STRUCTURES AND METHODS FOR CONTENT ADDRESSABLE ME...
- Publication number 20030043665
- Publication date Mar 6, 2003
- International Business Machines Corporation
- Hans M. Jacobson
- G11 - INFORMATION STORAGE
Information Patent Application
Synchronous to asynchronous to synchronous interface
- Publication number 20020120883
- Publication date Aug 29, 2002
- International Business Machines Corporation
- Peter W. Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Asynchronous pipeline control interface
- Publication number 20020083298
- Publication date Jun 27, 2002
- Peter William Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Adaptive issue queue for reduced power at high performance
- Publication number 20020053038
- Publication date May 2, 2002
- International Business Machines Corporation
- Alper Buyuktosunoglu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Latch structure for interlocked pipelined CMOS (IPCMOS) circuits
- Publication number 20010056552
- Publication date Dec 27, 2001
- International Business Machines Corporation
- Peter W. Cook
- G06 - COMPUTING CALCULATING COUNTING

Peter William Cook

Person

Patents Grantslast 30 patents

Adaptive issue queue for reduced power at high performance

Interlocked synchronous pipeline clock gating

Method of stalling one or more stages in an interlocked synchronous...

Interlocked synchronous pipeline clock gating

Processor with low overhead predictive supply voltage gating for le...

Processor with demand-driven clock throttling power reduction

Interlocked synchronous pipeline clock gating

Method of reducing leakage current in sub one volt SOI circuits

Method and structure for short range leakage control in pipelined c...

Asynchronous pipeline control interface using tag values to control...

Synchronous to asynchronous to synchronous interface

Latch structure for interlocked pipelined CMOS (IPCMOS) circuits

Low-power circuit structures and methods for content addressable me...

Circuit structures and methods for high-speed low-power select arbi...

Interlocked pipelined CMOS

Method of clock routing for semiconductor chips

IC chips including ALUs and identical register files whereby a numb...

CMOS and ECL logic circuit requiring no interface circuitry

Apparatus for determining if there is a loss of data during a shift...

Partial decode shifter/rotator

Carry lookahead logical mechanism using affirmatively referenced tr...

Avoidance of hot electron operation of voltage stressed bootstrap d...

Comparator circuit for a C-2C A/D and D/A converter

A/D and D/A converter using C-2C ladder network

Patents Applicationslast 30 patents

METHOD AND STRUCTURE FOR IMPLEMENTING B2B TRADING PARTNER BOARDING

INTERLOCKED SYNCHRONOUS PIPELINE CLOCK GATING

Interlocked synchronous pipeline clock gating

Interlocked synchronous pipeline clock gating

Method and structure for implementing B2B trading partner boarding

Method and structure for short range leakage control in pipelined c...

Method of reducing leakage current in sub one volt SOI circuits

Processor with low overhead predictive supply voltage gating for le...

Interlocked synchronous pipeline clock gating

Processor with demand-driven clock throttling power reduction

LOW-POWER CIRCUIT STRUCTURES AND METHODS FOR CONTENT ADDRESSABLE ME...

Synchronous to asynchronous to synchronous interface

Asynchronous pipeline control interface

Adaptive issue queue for reduced power at high performance

Latch structure for interlocked pipelined CMOS (IPCMOS) circuits