Phey-Chuin Tan

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Penang, MY

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Patents Grantslast 30 patents

Information Patent Grant
Via-configurable high-performance logic block involving transistor...
- Patent number 8,957,398
- Issue date Feb 17, 2015
- eASIC Corporation
- Alexander Andreev
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock network fishbone architecture for a structured ASIC manufactu...
- Patent number 8,629,548
- Issue date Jan 14, 2014
- eASIC Corporation
- Alexander Andreev
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Via-Configurable High-Performance Logic Block Involving Transistor...
- Publication number 20140028348
- Publication date Jan 30, 2014
- eASIC Corporation
- Alexander Andreev
- G06 - COMPUTING CALCULATING COUNTING