Phil P. Marcoux

Person

Mountain View, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Connection for off-chip electrostatic discharge protection
- Patent number 8,053,898
- Issue date Nov 8, 2011
- Samsung Electronics Co., Ltd.
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor with bottom-side wrap-around flange contact
- Patent number 7,858,512
- Issue date Dec 28, 2010
- Wafer-Level Packaging Portfolio LLC
- Phil P. Marcoux
- C07 - ORGANIC CHEMISTRY
Information Patent Grant
Integrated passive components and package with posts
- Patent number 6,954,130
- Issue date Oct 11, 2005
- ChipScale, Inc.
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated passive components and package with posts
- Patent number 6,946,734
- Issue date Sep 20, 2005
- ChipScale, Inc.
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated passive components and package with posts
- Patent number 6,833,986
- Issue date Dec 21, 2004
- ChipScale, Inc.
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated passive components and package with posts
- Patent number 6,414,585
- Issue date Jul 2, 2002
- ChipScale, Inc.
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer fabrication of die-bottom contacts for electronic devices
- Patent number 6,221,751
- Issue date Apr 24, 2001
- ChipScale, Inc.
- Changsheng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer fabrication of die-bottom contacts for electronic devices
- Patent number 5,910,687
- Issue date Jun 8, 1999
- ChipScale, Inc.
- Changsheng Chen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Dual Interconnection in Stacked Memory and Controller Module
- Publication number 20110169171
- Publication date Jul 14, 2011
- WAFER-LEVEL PACKAGING PORTFOLIO LLC
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Connection for Off-Chip Electrostatic Discharge Protection
- Publication number 20110079912
- Publication date Apr 7, 2011
- Interconnect Portfolio LLC
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor with Bottom-Side Wrap-Around Flange Contact
- Publication number 20100327448
- Publication date Dec 30, 2010
- WAFER-LEVEL PACKAGING PORTFOLIO LLC
- Phil P. Marcoux
- C08 - ORGANIC MACROMOLECULAR COMPOUNDS THEIR PREPARATION OR CHEMICAL WORKING-...
Information Patent Application
Dual Interconnection in Stacked Memory and Controller Module
- Publication number 20100270668
- Publication date Oct 28, 2010
- WAFER-LEVEL PACKAGING PORTFOLIO LLC
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR WITH BOTTOM-SIDE WRAP-AROUND FLANGE CONTACT
- Publication number 20090321930
- Publication date Dec 31, 2009
- Phil P. Marcoux
- C08 - ORGANIC MACROMOLECULAR COMPOUNDS THEIR PREPARATION OR CHEMICAL WORKING-...
Information Patent Application
SEMICONDUCTOR WITH TOP-SIDE WRAP-AROUND FLANGE CONTACT
- Publication number 20090324906
- Publication date Dec 31, 2009
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated passive components and package with posts
- Publication number 20040160299
- Publication date Aug 19, 2004
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated passive components and package with posts
- Publication number 20040160727
- Publication date Aug 19, 2004
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated passive components and package with posts
- Publication number 20020101329
- Publication date Aug 1, 2002
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS

Phil P. Marcoux

Person

Patents Grantslast 30 patents

Connection for off-chip electrostatic discharge protection

Semiconductor with bottom-side wrap-around flange contact

Integrated passive components and package with posts

Integrated passive components and package with posts

Integrated passive components and package with posts

Integrated passive components and package with posts

Wafer fabrication of die-bottom contacts for electronic devices

Wafer fabrication of die-bottom contacts for electronic devices

Patents Applicationslast 30 patents

Dual Interconnection in Stacked Memory and Controller Module

Connection for Off-Chip Electrostatic Discharge Protection

Semiconductor with Bottom-Side Wrap-Around Flange Contact

Dual Interconnection in Stacked Memory and Controller Module

SEMICONDUCTOR WITH BOTTOM-SIDE WRAP-AROUND FLANGE CONTACT

SEMICONDUCTOR WITH TOP-SIDE WRAP-AROUND FLANGE CONTACT

Integrated passive components and package with posts

Integrated passive components and package with posts

Integrated passive components and package with posts