PHILIP ABRAHAM

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Redundant cache-coherent memory fabric
- Patent number 11,604,730
- Issue date Mar 14, 2023
- Intel Corporation
- Rahul Pal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses, methods, and systems for hardware-assisted lockstep of...
- Patent number 11,340,960
- Issue date May 24, 2022
- Intel Corporation
- Umberto Santoni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware lockstep checking within a fault detection interval in a s...
- Patent number 10,831,628
- Issue date Nov 10, 2020
- Intel Corporation
- Umberto Santoni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable schedulers for memory controllers
- Patent number 8,977,811
- Issue date Mar 10, 2015
- Intel Corporation
- Philip Abraham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Robust memory link testing using memory controller
- Patent number 8,868,992
- Issue date Oct 21, 2014
- Intel Corporation
- Bryan L. Spry
- G11 - INFORMATION STORAGE
Information Patent Grant
Scalable schedulers for memory controllers
- Patent number 8,463,987
- Issue date Jun 11, 2013
- Intel Corporation
- Philip Abraham
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
REGION-AWARE MEMORY BANDWIDTH ALLOCATION CONTROL
- Publication number 20240330053
- Publication date Oct 3, 2024
- Intel Corporation
- Andrew J. Herdrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENERGY CONSUMPTION MEASUREMENT
- Publication number 20240273028
- Publication date Aug 15, 2024
- Intel Corporation
- Corey D. GOUGH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO-STAGE CACHE PARTITIONING
- Publication number 20230315632
- Publication date Oct 5, 2023
- Intel Corporation
- Philip Abraham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES, METHODS, AND SYSTEMS FOR HARDWARE-ASSISTED LOCKSTEP OF...
- Publication number 20210303372
- Publication date Sep 30, 2021
- Umberto Santoni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUNDANT CACHE-COHERENT MEMORY FABRIC
- Publication number 20210200678
- Publication date Jul 1, 2021
- Intel Corporation
- Rahul Pal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE LOCKSTEP CHECKING WITHIN A FAULT DETECTION INTERVAL IN A S...
- Publication number 20190114243
- Publication date Apr 18, 2019
- Intel Corporation
- Umberto Santoni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGEMENT FOR MEMORY ACCESSES IN A SYSTEM-ON-CHIP
- Publication number 20160091957
- Publication date Mar 31, 2016
- Suketu R. Partiwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE SCHEDULERS FOR MEMORY CONTROLLERS
- Publication number 20130275664
- Publication date Oct 17, 2013
- Philip Abraham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROBUST MEMORY LINK TESTING USING MEMORY CONTROLLER
- Publication number 20110161752
- Publication date Jun 30, 2011
- BRYAN L. SPRY
- G11 - INFORMATION STORAGE
Information Patent Application
Adaptive clock enable for memory control
- Publication number 20100169700
- Publication date Jul 1, 2010
- Philip Abraham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE SCHEDULERS FOR MEMORY CONTROLLERS
- Publication number 20100077140
- Publication date Mar 25, 2010
- Philip Abraham
- G06 - COMPUTING CALCULATING COUNTING

PHILIP ABRAHAM

Person

Patents Grantslast 30 patents

Redundant cache-coherent memory fabric

Apparatuses, methods, and systems for hardware-assisted lockstep of...

Hardware lockstep checking within a fault detection interval in a s...

Scalable schedulers for memory controllers

Robust memory link testing using memory controller

Scalable schedulers for memory controllers

Patents Applicationslast 30 patents

REGION-AWARE MEMORY BANDWIDTH ALLOCATION CONTROL

ENERGY CONSUMPTION MEASUREMENT

TWO-STAGE CACHE PARTITIONING

APPARATUSES, METHODS, AND SYSTEMS FOR HARDWARE-ASSISTED LOCKSTEP OF...

REDUNDANT CACHE-COHERENT MEMORY FABRIC

HARDWARE LOCKSTEP CHECKING WITHIN A FAULT DETECTION INTERVAL IN A S...

POWER MANAGEMENT FOR MEMORY ACCESSES IN A SYSTEM-ON-CHIP

SCALABLE SCHEDULERS FOR MEMORY CONTROLLERS

ROBUST MEMORY LINK TESTING USING MEMORY CONTROLLER

Adaptive clock enable for memory control

SCALABLE SCHEDULERS FOR MEMORY CONTROLLERS