Philip Browning Johnson

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
User-defined metered priority queues
- Patent number 11,954,518
- Issue date Apr 9, 2024
- NVIDIA Corporation
- Jonathon Evans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low overhead copy engine fault and switch mechanism
- Patent number 10,430,356
- Issue date Oct 1, 2019
- NVIDIA Corporation
- M. Wasiur Rashid
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Replicated stateless copy engine
- Patent number 10,423,424
- Issue date Sep 24, 2019
- NVIDIA Corporation
- Lincoln G. Garlick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing copy operations in complex processor topologies
- Patent number 10,275,275
- Issue date Apr 30, 2019
- NVIDIA Corporation
- M. Wasiur Rashid
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method, and computer program product for simultaneous execu...
- Patent number 10,217,183
- Issue date Feb 26, 2019
- NVIDIA Corporation
- Gregory S. Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing copy operations in complex processor topologies
- Patent number 10,180,916
- Issue date Jan 15, 2019
- NVIDIA Corporation
- M. Wasiur Rashid
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Setting a PCIE Device ID
- Patent number 9,639,494
- Issue date May 2, 2017
- NVIDIA Corporation
- Jesse Max Guss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for distributing work batches to processing units...
- Patent number 9,594,599
- Issue date Mar 14, 2017
- NVIDIA Corporation
- Philip Browning Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Concurrent execution of independent streams in multi-channel time s...
- Patent number 9,442,759
- Issue date Sep 13, 2016
- NVIDIA Corporation
- Samuel H. Duncan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Display balance / metering
- Patent number 9,001,134
- Issue date Apr 7, 2015
- NVIDIA Corporation
- Franck R. Diard
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Distributed vertex attribute fetch
- Patent number 8,947,444
- Issue date Feb 3, 2015
- NVIDIA Corporation
- Ziyad S. Hakura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vertex attribute buffer for inline immediate attributes and constants
- Patent number 8,810,592
- Issue date Aug 19, 2014
- NVIDIA Corporation
- Ziyad S. Hakura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processing systems with multiple processors connected in a...
- Patent number 8,698,816
- Issue date Apr 15, 2014
- NVIDIA Corporation
- Philip Browning Johnson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Parallel duplicate primitive vertex detection and batching
- Patent number 8,558,842
- Issue date Oct 15, 2013
- NVIDIA Corporation
- Philip B. Johnson
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Distributed antialiasing in a multiprocessor graphics system
- Patent number 8,130,227
- Issue date Mar 6, 2012
- NVIDIA Corporation
- Philip Browning Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple graphics adapter connection systems
- Patent number 8,066,515
- Issue date Nov 29, 2011
- NVIDIA Corporation
- Philip B. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detecting connection topology in a multi processor graphics system
- Patent number 7,898,544
- Issue date Mar 1, 2011
- NVIDIA Corporation
- Philip Browning Johnson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Optimizing power and performance for multi-processor graphics proce...
- Patent number 7,721,118
- Issue date May 18, 2010
- NVIDIA Corporation
- Anthony M. Tamasi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processing systems with multiple processors connected in a...
- Patent number 7,623,131
- Issue date Nov 24, 2009
- NVIDIA Corporation
- Philip Browning Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detecting connection topology in a multi-processor graphics system
- Patent number 7,561,163
- Issue date Jul 14, 2009
- NVIDIA Corporation
- Philip Browning Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sequencing of displayed images for alternate frame rendering in a m...
- Patent number 7,545,380
- Issue date Jun 9, 2009
- NVIDIA Corporation
- Franck R. Diard
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Display balance/metering
- Patent number 7,525,549
- Issue date Apr 28, 2009
- NVIDIA Corporation
- Franck R. Diard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coherence of displayed images for split-frame rendering in multi-pr...
- Patent number 7,522,167
- Issue date Apr 21, 2009
- NVIDIA Corporation
- Franck R. Diard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Connecting graphics adapters for scalable performance
- Patent number 7,477,256
- Issue date Jan 13, 2009
- NVIDIA Corporation
- Philip B. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable graphics processing for remote display
- Patent number 7,372,465
- Issue date May 13, 2008
- NVIDIA Corporation
- Anthony M. Tamasi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory clock slowdown synthesis circuit
- Patent number 7,042,263
- Issue date May 9, 2006
- NVIDIA Corporation
- Philip Browning Johnson
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
User-defined peripheral-bus device implementation
- Publication number 20240095205
- Publication date Mar 21, 2024
- MELLANOX TECHNOLOGIES, LTD.
- Daniel Marcovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Virtualizing Hardware Processing Resources in a Processor
- Publication number 20230288471
- Publication date Sep 14, 2023
- NVIDIA Corporation
- Jerome F. DULUK
- G01 - MEASURING TESTING
Information Patent Application
Flexible Migration of Executing Software Between Processing Compone...
- Publication number 20230289212
- Publication date Sep 14, 2023
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECT USER MODE WORK SUBMISSION IN SECURE COMPUTING ENABLED PROCES...
- Publication number 20230153146
- Publication date May 18, 2023
- NVIDIA Corporation
- Gobikrishna DHANUSKODI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USER-DEFINED METERED PRIORITY QUEUES
- Publication number 20210191754
- Publication date Jun 24, 2021
- NVIDIA Corporation
- Jonathon Evans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW OVERHEAD COPY ENGINE FAULT AND SWITCH MECHANISM
- Publication number 20180314431
- Publication date Nov 1, 2018
- NVIDIA Corporation
- M. Wasiur Rashid
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING COPY OPERATIONS IN COMPLEX PROCESSOR TOPOLOGIES
- Publication number 20170161099
- Publication date Jun 8, 2017
- NVIDIA Corporation
- M. Wasiur Rashid
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING COPY OPERATIONS IN COMPLEX PROCESSOR TOPOLOGIES
- Publication number 20170161100
- Publication date Jun 8, 2017
- NVIDIA Corporation
- M. Wasiur Rashid
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR SIMULTANEOUS EXECU...
- Publication number 20150178879
- Publication date Jun 25, 2015
- NVIDIA Corporation
- Gregory S. Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SETTING A PCIE DEVICE ID
- Publication number 20150127860
- Publication date May 7, 2015
- NVIDIA Corporation
- Jesse Max GUSS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REPLICATED STATELESS COPY ENGINE
- Publication number 20140095759
- Publication date Apr 3, 2014
- NVIDIA Corporation
- Lincoln G. GARLICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Channel Time Slice Groups
- Publication number 20130152093
- Publication date Jun 13, 2013
- Samuel H. DUNCAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE THREAD ARRAY GRANULARITY EXECUTION PREEMPTION
- Publication number 20130132711
- Publication date May 23, 2013
- Lacky V. SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION LEVEL EXECUTION PREEMPTION
- Publication number 20130124838
- Publication date May 16, 2013
- Lacky V. SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VERTEX ATTRIBUTE BUFFER FOR INLINE IMMEDIATE ATTRIBUTES AND CONSTANTS
- Publication number 20110102448
- Publication date May 5, 2011
- Ziyad S. HAKURA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSING SYSTEMS WITH MULTIPLE PROCESSORS CONNECTED IN A...
- Publication number 20110090232
- Publication date Apr 21, 2011
- NVIDIA Corporation
- Philip Browning Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTING CONNECTION TOPOLOGY IN A MULTI PROCESSOR GRAPHICS SYSTEM
- Publication number 20090273603
- Publication date Nov 5, 2009
- NVIDIA Corporation
- Philip Browning Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Display Balance / Metering
- Publication number 20090189908
- Publication date Jul 30, 2009
- NVIDIA Corporation
- Franck R. Diard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ANTIALIASING USING MULTIPLE DISPLAY HEADS OF A GRAPHICS PROCESSOR
- Publication number 20090085928
- Publication date Apr 2, 2009
- NVIDIA Corporation
- Duncan A. Riach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Distributed Antialiasing In A Multiprocessor Graphics System
- Publication number 20090079747
- Publication date Mar 26, 2009
- NVIDIA Corporation
- Philip Browning Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple graphics adapter connection systems
- Publication number 20060274073
- Publication date Dec 7, 2006
- Philip B. Johnson
- G06 - COMPUTING CALCULATING COUNTING

Philip Browning Johnson

Person

Patents Grantslast 30 patents

User-defined metered priority queues

Low overhead copy engine fault and switch mechanism

Replicated stateless copy engine

Managing copy operations in complex processor topologies

System, method, and computer program product for simultaneous execu...

Managing copy operations in complex processor topologies

Setting a PCIE Device ID

Method and system for distributing work batches to processing units...

Concurrent execution of independent streams in multi-channel time s...

Display balance / metering

Distributed vertex attribute fetch

Vertex attribute buffer for inline immediate attributes and constants

Graphics processing systems with multiple processors connected in a...

Parallel duplicate primitive vertex detection and batching

Distributed antialiasing in a multiprocessor graphics system

Multiple graphics adapter connection systems

Detecting connection topology in a multi processor graphics system

Optimizing power and performance for multi-processor graphics proce...

Graphics processing systems with multiple processors connected in a...

Detecting connection topology in a multi-processor graphics system

Sequencing of displayed images for alternate frame rendering in a m...

Display balance/metering

Coherence of displayed images for split-frame rendering in multi-pr...

Connecting graphics adapters for scalable performance

Scalable graphics processing for remote display

Memory clock slowdown synthesis circuit

Patents Applicationslast 30 patents

User-defined peripheral-bus device implementation

Virtualizing Hardware Processing Resources in a Processor

Flexible Migration of Executing Software Between Processing Compone...

DIRECT USER MODE WORK SUBMISSION IN SECURE COMPUTING ENABLED PROCES...

USER-DEFINED METERED PRIORITY QUEUES

LOW OVERHEAD COPY ENGINE FAULT AND SWITCH MECHANISM

MANAGING COPY OPERATIONS IN COMPLEX PROCESSOR TOPOLOGIES

MANAGING COPY OPERATIONS IN COMPLEX PROCESSOR TOPOLOGIES

SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR SIMULTANEOUS EXECU...

SETTING A PCIE DEVICE ID

REPLICATED STATELESS COPY ENGINE

Multi-Channel Time Slice Groups

COMPUTE THREAD ARRAY GRANULARITY EXECUTION PREEMPTION

INSTRUCTION LEVEL EXECUTION PREEMPTION

VERTEX ATTRIBUTE BUFFER FOR INLINE IMMEDIATE ATTRIBUTES AND CONSTANTS

GRAPHICS PROCESSING SYSTEMS WITH MULTIPLE PROCESSORS CONNECTED IN A...

DETECTING CONNECTION TOPOLOGY IN A MULTI PROCESSOR GRAPHICS SYSTEM

Display Balance / Metering

ANTIALIASING USING MULTIPLE DISPLAY HEADS OF A GRAPHICS PROCESSOR

Distributed Antialiasing In A Multiprocessor Graphics System

Multiple graphics adapter connection systems