Philip G. Shephard, III

Person

Round Rock, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for improved hierarchical analysis of electronic...
- Patent number 7,870,515
- Issue date Jan 11, 2011
- International Business Machines Corporation
- Philip G. Shephard, III
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and computer program for verifying performance of an array b...
- Patent number 7,552,413
- Issue date Jun 23, 2009
- International Business Machines Corporation
- Vikas Agarwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shift register latch with embedded dynamic random access memory sca...
- Patent number 7,474,574
- Issue date Jan 6, 2009
- International Business Machines Corporation
- Vikas Agarwal
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for verifying performance of an array by simulating operatio...
- Patent number 7,424,691
- Issue date Sep 9, 2008
- International Business Machines Corporation
- Vikas Agarwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multifunctional latch circuit for use with both SRAM array and self...
- Patent number 7,099,201
- Issue date Aug 29, 2006
- International Business Machines Corporation
- Andrew James Bianchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Test method for guaranteeing full stuck-at-fault coverage of a memo...
- Patent number 7,073,106
- Issue date Jul 4, 2006
- International Business Machines Corporation
- Jose A. Paredes
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
System and Method for Improved Hierarchical Analysis of Electronic...
- Publication number 20090183130
- Publication date Jul 16, 2009
- Philip G. Shephard, III
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHIFT REGISTER LATCH WITH EMBEDDED DYNAMIC RANDOM ACCESS MEMORY SCA...
- Publication number 20090010077
- Publication date Jan 8, 2009
- Vikas Agarwal
- G11 - INFORMATION STORAGE

Philip G. Shephard, III

Person

Patents Grantslast 30 patents

System and method for improved hierarchical analysis of electronic...

System and computer program for verifying performance of an array b...

Shift register latch with embedded dynamic random access memory sca...

Method for verifying performance of an array by simulating operatio...

Multifunctional latch circuit for use with both SRAM array and self...

Test method for guaranteeing full stuck-at-fault coverage of a memo...

Patents Applicationslast 30 patents

System and Method for Improved Hierarchical Analysis of Electronic...

SHIFT REGISTER LATCH WITH EMBEDDED DYNAMIC RANDOM ACCESS MEMORY SCA...