Philip Moyse

Person

Bromham, GB

People

Patents Grantslast 30 patents

Information Patent Grant
Three input arithmetic logic unit with barrel rotator
- Patent number 6,116,768
- Issue date Sep 12, 2000
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three input arithmetic logic unit with shifter
- Patent number 6,098,163
- Issue date Aug 1, 2000
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three input arithmetic logic unit with shifter and/or mask generator
- Patent number 5,995,748
- Issue date Nov 30, 1999
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three input arithmetic logic unit capable of performing all possibl...
- Patent number 5,995,747
- Issue date Nov 30, 1999
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three input arithmetic logic unit with shifter and mask generator
- Patent number 5,974,539
- Issue date Oct 26, 1999
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three input arithmetic logic unit with barrel rotator and mask gene...
- Patent number 5,961,635
- Issue date Oct 5, 1999
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Base address generation in a multi-processing system having plural...
- Patent number 5,761,726
- Issue date Jun 2, 1998
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware branching employing loop control registers loaded accordin...
- Patent number 5,734,880
- Issue date Mar 31, 1998
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data communications system with address remapping for expanded exte...
- Patent number 5,715,419
- Issue date Feb 3, 1998
- Texas Instruments Incorporated
- Andre Szczepanek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three input arithmetic logic unit with shifting means at one input...
- Patent number 5,696,954
- Issue date Dec 9, 1997
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for rounding using redundant coded multiply result
- Patent number 5,680,339
- Issue date Oct 21, 1997
- Texas Instruments Incorporated
- Philip Moyse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus and system for multiply rounding using redundant...
- Patent number 5,644,522
- Issue date Jul 1, 1997
- Texas Instruments Incorporated
- Philip Moyse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three input arithmetic logic unit with controllable shifter and mas...
- Patent number 5,634,065
- Issue date May 27, 1997
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three input arithmetic logic unit with mask generator
- Patent number 5,600,847
- Issue date Feb 4, 1997
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three input arithmetic logic unit with mask generator
- Patent number 5,590,350
- Issue date Dec 31, 1996
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split multiply operation
- Patent number 5,446,651
- Issue date Aug 29, 1995
- Texas Instruments Incorporated
- Phillip Moyse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit for detecting the position of an extreme "1" bit in a binar...
- Patent number 5,345,405
- Issue date Sep 6, 1994
- Texas Instruments Incorporated
- Brendan Walsh
- G06 - COMPUTING CALCULATING COUNTING

Philip Moyse

Person

Patents Grantslast 30 patents

Three input arithmetic logic unit with barrel rotator

Three input arithmetic logic unit with shifter

Three input arithmetic logic unit with shifter and/or mask generator

Three input arithmetic logic unit capable of performing all possibl...

Three input arithmetic logic unit with shifter and mask generator

Three input arithmetic logic unit with barrel rotator and mask gene...

Base address generation in a multi-processing system having plural...

Hardware branching employing loop control registers loaded accordin...

Data communications system with address remapping for expanded exte...

Three input arithmetic logic unit with shifting means at one input...

Method for rounding using redundant coded multiply result

Method, apparatus and system for multiply rounding using redundant...

Three input arithmetic logic unit with controllable shifter and mas...

Three input arithmetic logic unit with mask generator

Three input arithmetic logic unit with mask generator

Split multiply operation

Circuit for detecting the position of an extreme "1" bit in a binar...