Philip N. Strenski

Person

Yorktown Heights, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Tuple checkout with notify in coordination namespace system
- Patent number 11,726,788
- Issue date Aug 15, 2023
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sharing tuples across independent coordination namespace systems
- Patent number 11,516,290
- Issue date Nov 29, 2022
- International Business Machines Corporation
- Philip Jacob
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Synchronization between processes in a coordination namespace
- Patent number 11,513,867
- Issue date Nov 29, 2022
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interlinked tuples in coordination namespace
- Patent number 11,327,940
- Issue date May 10, 2022
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Map reduce using coordination namespace hardware acceleration
- Patent number 11,269,687
- Issue date Mar 8, 2022
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scatter gather using key-value store
- Patent number 11,061,676
- Issue date Jul 13, 2021
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronization between processes in a coordination namespace
- Patent number 11,023,291
- Issue date Jun 1, 2021
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffered freepointer management memory system
- Patent number 10,901,887
- Issue date Jan 26, 2021
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using layout enumeration to facilitate integrated circuit development
- Patent number 8,443,322
- Issue date May 14, 2013
- International Business Machines Corporation
- Philip N. Strenski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parameter variation tolerant method for circuit design optimization
- Patent number 6,826,733
- Issue date Nov 30, 2004
- International Business Machines Corporation
- David J. Hathaway
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYNCHRONIZATION BETWEEN PROCESSES IN A COORDINATION NAMESPACE
- Publication number 20210271526
- Publication date Sep 2, 2021
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARING TUPLES ACROSS INDEPENDENT COORDINATION NAMESPACE SYSTEMS
- Publication number 20210194958
- Publication date Jun 24, 2021
- International Business Machines Corporation
- Philip Jacob
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTERLINKED TUPLES IN COORDINATION NAMESPACE
- Publication number 20210191914
- Publication date Jun 24, 2021
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TUPLE CHECKOUT WITH NOTIFY IN COORDINATION NAMESPACE SYSTEM
- Publication number 20210191727
- Publication date Jun 24, 2021
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAP REDUCE USING COORDINATION NAMESPACE HARDWARE ACCELERATION
- Publication number 20200394077
- Publication date Dec 17, 2020
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONIZATION BETWEEN PROCESSES IN A COORDINATION NAMESPACE
- Publication number 20200356419
- Publication date Nov 12, 2020
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scatter Gather Using Key-Value Store
- Publication number 20200341764
- Publication date Oct 29, 2020
- International Business Machines Corporation
- Philip JACOB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFERED FREEPOINTER MANAGEMENT MEMORY SYSTEM
- Publication number 20190354472
- Publication date Nov 21, 2019
- International Business Machines Corporation
- Philip Jacob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING LAYOUT ENUMERATION TO FACILITATE INTEGRATED CIRCUIT DEVELOPMENT
- Publication number 20100242000
- Publication date Sep 23, 2010
- International Business Machines Corporation
- PHILIP N. STRENSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parameter variation tolerant method for circuit design optimization
- Publication number 20030226122
- Publication date Dec 4, 2003
- International Business Machines Corporation
- David J. Hathaway
- G06 - COMPUTING CALCULATING COUNTING

Philip N. Strenski

Person

Patents Grantslast 30 patents

Tuple checkout with notify in coordination namespace system

Sharing tuples across independent coordination namespace systems

Synchronization between processes in a coordination namespace

Interlinked tuples in coordination namespace

Map reduce using coordination namespace hardware acceleration

Scatter gather using key-value store

Synchronization between processes in a coordination namespace

Buffered freepointer management memory system

Using layout enumeration to facilitate integrated circuit development

Parameter variation tolerant method for circuit design optimization

Patents Applicationslast 30 patents

SYNCHRONIZATION BETWEEN PROCESSES IN A COORDINATION NAMESPACE

SHARING TUPLES ACROSS INDEPENDENT COORDINATION NAMESPACE SYSTEMS

INTERLINKED TUPLES IN COORDINATION NAMESPACE

TUPLE CHECKOUT WITH NOTIFY IN COORDINATION NAMESPACE SYSTEM

MAP REDUCE USING COORDINATION NAMESPACE HARDWARE ACCELERATION

SYNCHRONIZATION BETWEEN PROCESSES IN A COORDINATION NAMESPACE

Scatter Gather Using Key-Value Store

BUFFERED FREEPOINTER MANAGEMENT MEMORY SYSTEM

USING LAYOUT ENUMERATION TO FACILITATE INTEGRATED CIRCUIT DEVELOPMENT

Parameter variation tolerant method for circuit design optimization