Ping Hou

Person

Frmont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Error correction for flash memory
- Patent number 9,280,421
- Issue date Mar 8, 2016
- Cypress Semiconductor Corporation
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Low-density parity-check code based error correction for memory device
- Patent number 8,301,963
- Issue date Oct 30, 2012
- Spansion LLC
- Ping Hou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error correction for flash memory
- Patent number 8,296,626
- Issue date Oct 23, 2012
- Spansion LLC
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Cache auto-flush in a solid state memory device
- Patent number 8,271,737
- Issue date Sep 18, 2012
- Spansion LLC
- Richard Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient memory hierarchy in solid state drive design
- Patent number 8,261,006
- Issue date Sep 4, 2012
- Spansion LLC
- Richard Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for locating error bits in encoded data
- Patent number 8,255,777
- Issue date Aug 28, 2012
- Spansion LLC
- Ping Hou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power safe translation table operation in flash memory
- Patent number 7,761,740
- Issue date Jul 20, 2010
- Spansion LLC
- Wiliam Kern
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive detection of threshold levels in memory
- Patent number 7,672,161
- Issue date Mar 2, 2010
- Spansion LLC
- Ping Hou
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ERROR CORRECTION FOR FLASH MEMORY
- Publication number 20130024742
- Publication date Jan 24, 2013
- SPANSION LLC
- Hagop Nazarian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE AUTO-FLUSH IN A SOLID STATE MEMORY DEVICE
- Publication number 20100306448
- Publication date Dec 2, 2010
- Richard Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR LOCATING ERROR BITS IN ENCODED DATA
- Publication number 20100205513
- Publication date Aug 12, 2010
- Ping Hou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION FOR FLASH MEMORY
- Publication number 20100122146
- Publication date May 13, 2010
- SPANSION LLC
- Hagop Nazarian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT MEMORY HIERARCHY IN SOLID STATE DRIVE DESIGN
- Publication number 20090164700
- Publication date Jun 25, 2009
- SPANSION LLC
- Richard Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER SAFE TRANSLATION TABLE OPERATION IN FLASH MEMORY
- Publication number 20090158085
- Publication date Jun 18, 2009
- SPANSION LLC
- William Kern
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW-DENSITY PARITY-CHECK CODE BASED ERROR CORRECTION FOR MEMORY DEVICE
- Publication number 20090106626
- Publication date Apr 23, 2009
- SPANSION LLC
- Ping Hou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE DETECTION OF THRESHOLD LEVELS IN MEMORY
- Publication number 20080266945
- Publication date Oct 30, 2008
- SPANSION LLC
- Ping Hou
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Error correction for flash memory

Low-density parity-check code based error correction for memory device

Error correction for flash memory

Cache auto-flush in a solid state memory device

Efficient memory hierarchy in solid state drive design

Systems and methods for locating error bits in encoded data

Power safe translation table operation in flash memory

Adaptive detection of threshold levels in memory

Patents Applicationslast 30 patents

ERROR CORRECTION FOR FLASH MEMORY

CACHE AUTO-FLUSH IN A SOLID STATE MEMORY DEVICE

SYSTEMS AND METHODS FOR LOCATING ERROR BITS IN ENCODED DATA

ERROR CORRECTION FOR FLASH MEMORY

EFFICIENT MEMORY HIERARCHY IN SOLID STATE DRIVE DESIGN

POWER SAFE TRANSLATION TABLE OPERATION IN FLASH MEMORY

LOW-DENSITY PARITY-CHECK CODE BASED ERROR CORRECTION FOR MEMORY DEVICE

ADAPTIVE DETECTION OF THRESHOLD LEVELS IN MEMORY