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Hsin-chu, TW
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Patents Grants
last 30 patents
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Patent Grant
Highly latchup-immune CMOS I/O structures
Patent number
6,614,078
Issue date
Sep 2, 2003
Taiwan Semiconductor Manufacturing Company
Jian-Hsing Lee
H01 - BASIC ELECTRIC ELEMENTS
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Patent Grant
Method of manufacturing a highly latchup-immune CMOS I/O structure
Patent number
6,420,221
Issue date
Jul 16, 2002
Taiwan Semiconductor Manufacturing Company
Jian-Hsing Lee
H01 - BASIC ELECTRIC ELEMENTS
Patents Applications
last 30 patents
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Patent Application
Highly latchup-immune CMOS I/O structures
Publication number
20020164848
Publication date
Nov 7, 2002
Jian-Hsing Lee
H01 - BASIC ELECTRIC ELEMENTS