Pitamber Shukla

Person

Milpitas, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Read calibration by sector of memory
- Patent number 12,153,490
- Issue date Nov 26, 2024
- Micron Technology, Inc.
- Priya Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory operation based on block-associated temperature
- Patent number 12,124,705
- Issue date Oct 22, 2024
- Micron Technology, Inc.
- Pitamber Shukla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic prioritization of selector VT scans
- Patent number 12,106,813
- Issue date Oct 1, 2024
- Micron Technology, Inc.
- Pitamber Shukla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive erase pulse width modulation based on erase suspend during...
- Patent number 12,068,036
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Jiun-horng Lai
- G11 - INFORMATION STORAGE
Information Patent Grant
Determining read voltage offset in memory devices
- Patent number 12,057,190
- Issue date Aug 6, 2024
- Micron Technology, Inc.
- Robert W. Mason
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic block categorization to improve reliability and performance...
- Patent number 11,972,114
- Issue date Apr 30, 2024
- Micron Technology, Inc.
- Sandeep Reddy Kadasani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system for memory cell touch-up
- Patent number 11,967,386
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Bin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system failure detection and self recovery of memory dice
- Patent number 11,966,303
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Robert Mason
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latent read disturb mitigation in memory devices
- Patent number 11,847,335
- Issue date Dec 19, 2023
- Micron Technology, Inc.
- Pitamber Shukla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive background scans in a memory sub-system
- Patent number 11,797,376
- Issue date Oct 24, 2023
- Micron Technology, Inc.
- Scott Anthony Stoller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjusting a preprogram voltage based on use of a memory device
- Patent number 11,709,616
- Issue date Jul 25, 2023
- Micron Technology, Inc.
- Priya Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System driven pass-through voltage adjustment to improve read distu...
- Patent number 11,693,587
- Issue date Jul 4, 2023
- Micron Technology, Inc.
- Sandeep Reddy Kadasani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Program voltage step based on program-suspend time
- Patent number 11,626,163
- Issue date Apr 11, 2023
- Micron Technology, Inc.
- Justin Bates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power loss immunity in memory programming operations
- Patent number 11,594,292
- Issue date Feb 28, 2023
- Micron Technology, Inc.
- Scott A. Stoller
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive background scans in a memory sub-system
- Patent number 11,556,410
- Issue date Jan 17, 2023
- Micron Technology, Inc.
- Scott Anthony Stoller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temperature-dependent operations in a memory device
- Patent number 11,468,949
- Issue date Oct 11, 2022
- Micron Technology, Inc.
- Pitamber Shukla
- G11 - INFORMATION STORAGE
Information Patent Grant
Adjusting a preprogram voltage based on use of a memory device
- Patent number 11,461,035
- Issue date Oct 4, 2022
- Micron Technology, Inc.
- Priya Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Setting an initial erase voltage using feedback from previous opera...
- Patent number 11,443,812
- Issue date Sep 13, 2022
- Micron Technology, Inc.
- Scott A. Stoller
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with fast partial page operation
- Patent number 11,031,085
- Issue date Jun 8, 2021
- SanDisk Technologies LLC
- Mohan V Dunga
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wordline smart tracking verify
- Patent number 10,971,240
- Issue date Apr 6, 2021
- SanDisk Technologies LLC
- Mohan Dunga
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for high-performance write operations
- Patent number 10,878,926
- Issue date Dec 29, 2020
- SanDisk Technologies LLC
- Pitamber Shukla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System handling for first read read disturb
- Patent number 10,790,031
- Issue date Sep 29, 2020
- Western Digital Technologies, Inc.
- Piyush Sagdeo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Recovering data from a faulty memory block in a memory system
- Patent number 10,755,798
- Issue date Aug 25, 2020
- Western Digital Technologies, Inc.
- Niles Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory with fast partial page operation
- Patent number 10,741,251
- Issue date Aug 11, 2020
- SanDisk Technologies LLC
- Mohan V Dunga
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for programming non-volatile memory during burst...
- Patent number 10,714,169
- Issue date Jul 14, 2020
- SanDisk Technologies LLC
- Phil Reusswig
- G11 - INFORMATION STORAGE
Information Patent Grant
Relaxed erase parameters for block erasures in non-volatile storage...
- Patent number 10,636,493
- Issue date Apr 28, 2020
- Western Digital Technologies, Inc.
- Niles Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Boundary word line voltage shift
- Patent number 10,559,366
- Issue date Feb 11, 2020
- Western Digital Technologies, Inc.
- Zhenlei Shen
- G11 - INFORMATION STORAGE
Information Patent Grant
Single pulse SLC programming scheme
- Patent number 10,541,031
- Issue date Jan 21, 2020
- SanDisk Technologies LLC
- Mohan Vamsi Dunga
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory and method for power efficient read or verify u...
- Patent number 10,460,814
- Issue date Oct 29, 2019
- Western Digital Technologies, Inc.
- Piyush Dak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for high-performance write operations
- Patent number 10,460,816
- Issue date Oct 29, 2019
- SanDisk Technologies LLC
- Pitamber Shukla
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
REDUCING PARTIAL BLOCK PROGRAMMING USING DYNAMIC TRIM SETTINGS
- Publication number 20240412803
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Qun Su
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR MANAGING A VOLTAGE RECOVERY OPERATION
- Publication number 20240371452
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Pitamber Shukla
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY PILLAR SELECTION TRANSISTOR EVALUATION
- Publication number 20240355392
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Avinash Rajagiri
- G11 - INFORMATION STORAGE
Information Patent Application
DETERMINING READ VOLTAGE OFFSET IN MEMORY DEVICES
- Publication number 20240347084
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Robert W. Mason
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE BLOCK FAMILY ERROR AVOIDANCE SCAN BASED ON DYNAMIC PAGE ER...
- Publication number 20240339172
- Publication date Oct 10, 2024
- Micron Technology, Inc.
- Yugang Yu
- G11 - INFORMATION STORAGE
Information Patent Application
PARTIALLY PROGRAMMED BLOCK READ OPERATIONS
- Publication number 20240303187
- Publication date Sep 12, 2024
- Micron Technology, Inc.
- Pitamber Shukla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC ERASE VOLTAGE STEP
- Publication number 20240281148
- Publication date Aug 22, 2024
- Micron Technology, Inc.
- Jiun-Horng Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING PARTIALLY PROGRAMMED BLOCKS
- Publication number 20240256142
- Publication date Aug 1, 2024
- Micron Technology, Inc.
- Chun Sum Yeung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC BLOCK CATEGORIZATION TO IMPROVE RELIABILITY AND PERFORMANCE...
- Publication number 20240248616
- Publication date Jul 25, 2024
- Micron Technology, Inc.
- Sandeep Reddy Kadasani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC WORD LINE ALLOCATION IN MEMORY SYSTEMS
- Publication number 20240249789
- Publication date Jul 25, 2024
- Micron Technology, Inc.
- Tarun Singh Yadav
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAM PULSE MODIFICATION
- Publication number 20240248612
- Publication date Jul 25, 2024
- Micron Technology, Inc.
- Lei Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING TRAP-UP IN A MEMORY SYSTEM
- Publication number 20240233842
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Pitamber Shukla
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM FAILURE DETECTION AND SELF RECOVERY OF MEMORY DICE
- Publication number 20240220375
- Publication date Jul 4, 2024
- Micron Technology, Inc.
- Robert Mason
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEBIASING SCHEME FOR PARTIAL BLOCK ERASE BASED ON WORD LINE GROUPS
- Publication number 20240194270
- Publication date Jun 13, 2024
- Micron Technology, Inc.
- Qun Su
- G11 - INFORMATION STORAGE
Information Patent Application
PROBABILISTIC DATA INTEGRITY SCANS USING RISK FACTOR ESTIMATION
- Publication number 20240177760
- Publication date May 30, 2024
- Micron Technology, Inc.
- Robert Winston MASON
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SUB-SYSTEM FOR MEMORY CELL IN-FIELD TOUCH-UP
- Publication number 20240152279
- Publication date May 9, 2024
- Micron Technology, Inc.
- Huai-Yuan Tseng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING DEFECTIVE BLOCKS DURING MULTI-PLANE PROGRAMMING OPERATIONS...
- Publication number 20240071528
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Robert W. Mason
- G11 - INFORMATION STORAGE
Information Patent Application
DETERMINING READ VOLTAGE OFFSET IN MEMORY DEVICES
- Publication number 20240071440
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Robert W. Mason
- G11 - INFORMATION STORAGE
Information Patent Application
LOW STRESS REFRESH ERASE IN A MEMORY DEVICE
- Publication number 20240062827
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Ronit Roneel Prakash
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC BLOCK CATEGORIZATION TO IMPROVE RELIABILITY AND PERFORMANCE...
- Publication number 20240020020
- Publication date Jan 18, 2024
- Micron Technology, Inc.
- Sandeep Reddy Kadasani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY OPERATION BASED ON BLOCK-ASSOCIATED TEMPERATURE
- Publication number 20230418475
- Publication date Dec 28, 2023
- Micron Technology, Inc.
- Pitamber Shukla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE ERASE PULSE WIDTH MODULATION BASED ON ERASE SUSPEND DURING...
- Publication number 20230402103
- Publication date Dec 14, 2023
- Micron Technology, Inc.
- Jiun-horng Lai
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM FAILURE DETECTION AND SELF RECOVERY OF MEMORY DICE
- Publication number 20230393955
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Robert Mason
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUB-SYSTEM FOR MEMORY CELL TOUCH-UP
- Publication number 20230377664
- Publication date Nov 23, 2023
- Micron Technology, Inc.
- Bin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEMS WITH FLEXIBLE ERASE SUSPEND-RESUME OPERATIONS, AND A...
- Publication number 20230360708
- Publication date Nov 9, 2023
- Micron Technology, Inc.
- Pitamber Shukla
- G11 - INFORMATION STORAGE
Information Patent Application
REUSE OF BAD BLOCKS FOR TASKS IN A MEMORY SUB-SYSTEM
- Publication number 20230333762
- Publication date Oct 19, 2023
- Micron Technology, Inc.
- Robert Mason
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ CALIBRATION BY SECTOR OF MEMORY
- Publication number 20230214299
- Publication date Jul 6, 2023
- Micron Technology, Inc.
- Priya Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PRIORITIZATION OF SELECTOR VT SCANS
- Publication number 20230195355
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Pitamber Shukla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE READ-RETRY OFFSET BASED ON WORD LINE GROUPS FOR SYSTEMS
- Publication number 20230197157
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Sandeep Kadasani
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE BACKGROUND SCANS IN A MEMORY SUB-SYSTEM
- Publication number 20230113480
- Publication date Apr 13, 2023
- Micron Technology, Inc.
- Scott Anthony Stoller
- G06 - COMPUTING CALCULATING COUNTING

Pitamber Shukla

Person

Patents Grantslast 30 patents

Read calibration by sector of memory

Memory operation based on block-associated temperature

Dynamic prioritization of selector VT scans

Adaptive erase pulse width modulation based on erase suspend during...

Determining read voltage offset in memory devices

Dynamic block categorization to improve reliability and performance...

Memory sub-system for memory cell touch-up

Memory system failure detection and self recovery of memory dice

Latent read disturb mitigation in memory devices

Adaptive background scans in a memory sub-system

Adjusting a preprogram voltage based on use of a memory device

System driven pass-through voltage adjustment to improve read distu...

Program voltage step based on program-suspend time

Power loss immunity in memory programming operations

Adaptive background scans in a memory sub-system

Temperature-dependent operations in a memory device

Adjusting a preprogram voltage based on use of a memory device

Setting an initial erase voltage using feedback from previous opera...

Non-volatile memory with fast partial page operation

Wordline smart tracking verify

Systems and methods for high-performance write operations

System handling for first read read disturb

Recovering data from a faulty memory block in a memory system

Non-volatile memory with fast partial page operation

System and method for programming non-volatile memory during burst...

Relaxed erase parameters for block erasures in non-volatile storage...

Boundary word line voltage shift

Single pulse SLC programming scheme

Non-volatile memory and method for power efficient read or verify u...

Systems and methods for high-performance write operations

Patents Applicationslast 30 patents

REDUCING PARTIAL BLOCK PROGRAMMING USING DYNAMIC TRIM SETTINGS

TECHNIQUES FOR MANAGING A VOLTAGE RECOVERY OPERATION

MEMORY PILLAR SELECTION TRANSISTOR EVALUATION

DETERMINING READ VOLTAGE OFFSET IN MEMORY DEVICES

ADAPTIVE BLOCK FAMILY ERROR AVOIDANCE SCAN BASED ON DYNAMIC PAGE ER...

PARTIALLY PROGRAMMED BLOCK READ OPERATIONS

DYNAMIC ERASE VOLTAGE STEP

MANAGING PARTIALLY PROGRAMMED BLOCKS

DYNAMIC BLOCK CATEGORIZATION TO IMPROVE RELIABILITY AND PERFORMANCE...

DYNAMIC WORD LINE ALLOCATION IN MEMORY SYSTEMS

PROGRAM PULSE MODIFICATION

MANAGING TRAP-UP IN A MEMORY SYSTEM

MEMORY SYSTEM FAILURE DETECTION AND SELF RECOVERY OF MEMORY DICE

DEBIASING SCHEME FOR PARTIAL BLOCK ERASE BASED ON WORD LINE GROUPS

PROBABILISTIC DATA INTEGRITY SCANS USING RISK FACTOR ESTIMATION

MEMORY SUB-SYSTEM FOR MEMORY CELL IN-FIELD TOUCH-UP

MANAGING DEFECTIVE BLOCKS DURING MULTI-PLANE PROGRAMMING OPERATIONS...

DETERMINING READ VOLTAGE OFFSET IN MEMORY DEVICES

LOW STRESS REFRESH ERASE IN A MEMORY DEVICE

DYNAMIC BLOCK CATEGORIZATION TO IMPROVE RELIABILITY AND PERFORMANCE...

MEMORY OPERATION BASED ON BLOCK-ASSOCIATED TEMPERATURE

ADAPTIVE ERASE PULSE WIDTH MODULATION BASED ON ERASE SUSPEND DURING...

MEMORY SYSTEM FAILURE DETECTION AND SELF RECOVERY OF MEMORY DICE

MEMORY SUB-SYSTEM FOR MEMORY CELL TOUCH-UP

MEMORY SYSTEMS WITH FLEXIBLE ERASE SUSPEND-RESUME OPERATIONS, AND A...

REUSE OF BAD BLOCKS FOR TASKS IN A MEMORY SUB-SYSTEM

READ CALIBRATION BY SECTOR OF MEMORY

DYNAMIC PRIORITIZATION OF SELECTOR VT SCANS

ADAPTIVE READ-RETRY OFFSET BASED ON WORD LINE GROUPS FOR SYSTEMS

ADAPTIVE BACKGROUND SCANS IN A MEMORY SUB-SYSTEM