Po-Chuan Kang

Person

Hsinchu, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Device for temperature monitoring of a semiconductor device
- Patent number 11,898,916
- Issue date Feb 13, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Po-Zeng Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power on control circuits and methods of operating the same
- Patent number 11,711,076
- Issue date Jul 25, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Po-Zeng Kang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device with source resistor and manufacturing method...
- Patent number 11,670,586
- Issue date Jun 6, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Po-Zeng Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device and method for temperature monitoring of a semiconductor device
- Patent number 11,215,513
- Issue date Jan 4, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Po-Zeng Kang
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor device with source resistor and manufacturing method...
- Patent number 11,217,526
- Issue date Jan 4, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd
- Po-Zeng Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Uni-gate cell design
- Patent number 10,872,189
- Issue date Dec 22, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Wen-Shen Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
IC degradation management circuit, system and method
- Patent number 10,514,417
- Issue date Dec 24, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Po-Zeng Kang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Output resistance testing integrated circuit
- Patent number 10,401,407
- Issue date Sep 3, 2019
- TAIWAN SEMICONDUCOR MANUFACTURING COMPANY, LTD.
- Wen-Shen Chou
- G01 - MEASURING TESTING
Information Patent Grant
Time to current converter
- Patent number 10,274,536
- Issue date Apr 30, 2019
- Taiwan Semiconductor Manufacturing Company Limited
- Yung-Chow Peng
- G01 - MEASURING TESTING
Information Patent Grant
IC degradation management circuit, system and method
- Patent number 10,222,412
- Issue date Mar 5, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Po-Zeng Kang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Output resistance testing method
- Patent number 10,161,976
- Issue date Dec 25, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd
- Wen-Shen Chou
- G01 - MEASURING TESTING
Information Patent Grant
Output resistance testing structure
- Patent number 10,018,660
- Issue date Jul 10, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd
- Wen-Shen Chou
- G01 - MEASURING TESTING
Information Patent Grant
Nearly buffer zone free layout methodology
- Patent number 9,659,919
- Issue date May 23, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yung-Chow Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three-dimensional image apparatus and operation method thereof
- Patent number 9,591,288
- Issue date Mar 7, 2017
- Young Optics Inc.
- Chi-Lung Chang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low gds measurement methodology for MOS
- Patent number 9,429,607
- Issue date Aug 30, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yung-Chow Peng
- G01 - MEASURING TESTING
Information Patent Grant
FinFET with embedded MOS varactor and method of making same
- Patent number 9,343,552
- Issue date May 17, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wan-Te Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor mismatch reduction
- Patent number 9,287,252
- Issue date Mar 15, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chung-Hui Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFET with embedded MOS varactor and method of making same
- Patent number 9,064,725
- Issue date Jun 23, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wan-Te Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nearly buffer zone free layout methodology
- Patent number 8,916,955
- Issue date Dec 23, 2014
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yung-Chow Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device feature density gradient verification
- Patent number 8,856,707
- Issue date Oct 7, 2014
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Young-Chow Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device feature density gradient verification
- Patent number 8,549,453
- Issue date Oct 1, 2013
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Young-Chow Peng
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TEMPERATURE MONITORING DEVICE AND METHOD
- Publication number 20240159599
- Publication date May 16, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Po-Zeng KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER ON CONTROL CIRCUITS AND METHODS OF OPERATING THE SAME
- Publication number 20240022245
- Publication date Jan 18, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Po-Zeng KANG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ANALOG-CELLS-BOUNDARY REGION WITH BURIED POWER GRID SEGMENT, SEMICO...
- Publication number 20240014136
- Publication date Jan 11, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ming-Cheng SYU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT LAYOUT METHOD
- Publication number 20230402452
- Publication date Dec 14, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Po-Zeng KANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE WITH SOURCE RESISTOR
- Publication number 20230260902
- Publication date Aug 17, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Po-Zeng KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH VOLTAGE GUARD RING SEMICONDUCTOR DEVICE AND METHOD OF FORMING...
- Publication number 20230043245
- Publication date Feb 9, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ming-Cheng SYU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER ON CONTROL CIRCUITS AND METHODS OF OPERATING THE SAME
- Publication number 20220352887
- Publication date Nov 3, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Po-Zeng KANG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR DEVICE WITH SOURCE RESISTOR AND MANUFACTURING METHOD...
- Publication number 20220122913
- Publication date Apr 21, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Po-Zeng KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE FOR TEMPERATURE MONITORING OF A SEMICONDUCTOR DEVICE
- Publication number 20220082451
- Publication date Mar 17, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Po-Zeng KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICE, METHOD, LAYOUT, AND SYSTEM
- Publication number 20220037312
- Publication date Feb 3, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Po-Zeng KANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE AND METHOD FOR TEMPERATURE MONITORING OF A SEMICONDUCTOR DEVICE
- Publication number 20210116308
- Publication date Apr 22, 2021
- Taiwan Semiconductor Manufacturing company Ltd.
- Po-Zeng KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH SOURCE RESISTOR AND MANUFACTURING METHOD...
- Publication number 20200279809
- Publication date Sep 3, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Po-Zeng KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IC DEGRADATION MANAGEMENT CIRCUIT, SYSTEM AND METHOD
- Publication number 20190195943
- Publication date Jun 27, 2019
- Taiwan Semiconductor Manufacturing Co., LTD
- Po-Zeng KANG
- G01 - MEASURING TESTING
Information Patent Application
UNI-GATE CELL DESIGN
- Publication number 20190179993
- Publication date Jun 13, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Wen-Shen CHOU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OUTPUT RESISTANCE TESTING INTEGRATED CIRCUIT
- Publication number 20190094277
- Publication date Mar 28, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Shen CHOU
- G01 - MEASURING TESTING
Information Patent Application
OUTPUT RESISTANCE TESTING METHOD
- Publication number 20180321291
- Publication date Nov 8, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Shen CHOU
- G01 - MEASURING TESTING
Information Patent Application
TIME TO CURRENT CONVERTER
- Publication number 20180031627
- Publication date Feb 1, 2018
- Taiwan Semiconductor Manufacturing Company Limited
- Yung-Chow Peng
- G01 - MEASURING TESTING
Information Patent Application
IC DEGRADATION MANAGEMENT CIRCUIT, SYSTEM AND METHOD
- Publication number 20170350938
- Publication date Dec 7, 2017
- Taiwan Semiconductor Manufacturing Co., LTD
- Po-Zeng KANG
- G01 - MEASURING TESTING
Information Patent Application
OUTPUT RESISTANCE TESTING STRUCTURE AND METHOD OF USING THE SAME
- Publication number 20150362539
- Publication date Dec 17, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wen-Shen CHOU
- G01 - MEASURING TESTING
Information Patent Application
FinFET with Embedded MOS Varactor and Method of Making Same
- Publication number 20150270368
- Publication date Sep 24, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wan-Te Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW gds MEASUREMENT METHODOLOGY FOR MOS
- Publication number 20150168468
- Publication date Jun 18, 2015
- Taiwan Semiconductor Manufacturing Co., LTD
- Yung-Chow Peng
- G01 - MEASURING TESTING
Information Patent Application
NEARLY BUFFER ZONE FREE LAYOUT METHODOLOGY
- Publication number 20150108610
- Publication date Apr 23, 2015
- Taiwan Semiconductor Manufacturing Co., LTD
- Yung-Chow Peng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL IMAGE APPARATUS AND OPERATION METHOD THEREOF
- Publication number 20140362189
- Publication date Dec 11, 2014
- Young Optics Inc.
- Chi-Lung Chang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FinFET with Embedded MOS Varactor and Method of Making Same
- Publication number 20140167172
- Publication date Jun 19, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wan-Te Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nearly Buffer Zone Free Layout Methodology
- Publication number 20140103494
- Publication date Apr 17, 2014
- Taiwan Semiconductor Manufacturing Co., LTD
- Yung-Chow Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE FEATURE DENSITY GRADIENT VERIFICATION
- Publication number 20130346935
- Publication date Dec 26, 2013
- Taiwan Semiconductor Manufacturing Co., LTD
- Young-Chow Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE FEATURE DENSITY GRADIENT VERIFICATION
- Publication number 20130198710
- Publication date Aug 1, 2013
- Taiwan Semiconductor Manufacturing Co., LTD
- Young-Chow Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Mismatch Reduction
- Publication number 20120235208
- Publication date Sep 20, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chung-Hui Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INPUT/OUTPUT DEVICE AND HUMAN-MACHINE INTERACTION SYSTEM AND METHOD...
- Publication number 20120038592
- Publication date Feb 16, 2012
- Young Optics Inc.
- Jyh-Horng Shyu
- G06 - COMPUTING CALCULATING COUNTING

Po-Chuan Kang

Person

Patents Grantslast 30 patents

Device for temperature monitoring of a semiconductor device

Power on control circuits and methods of operating the same

Semiconductor device with source resistor and manufacturing method...

Device and method for temperature monitoring of a semiconductor device

Semiconductor device with source resistor and manufacturing method...

Uni-gate cell design

IC degradation management circuit, system and method

Output resistance testing integrated circuit

Time to current converter

IC degradation management circuit, system and method

Output resistance testing method

Output resistance testing structure

Nearly buffer zone free layout methodology

Three-dimensional image apparatus and operation method thereof

Low gds measurement methodology for MOS

FinFET with embedded MOS varactor and method of making same

Semiconductor mismatch reduction

FinFET with embedded MOS varactor and method of making same

Nearly buffer zone free layout methodology

Semiconductor device feature density gradient verification

Semiconductor device feature density gradient verification

Patents Applicationslast 30 patents

TEMPERATURE MONITORING DEVICE AND METHOD

POWER ON CONTROL CIRCUITS AND METHODS OF OPERATING THE SAME

ANALOG-CELLS-BOUNDARY REGION WITH BURIED POWER GRID SEGMENT, SEMICO...

INTEGRATED CIRCUIT LAYOUT METHOD

SEMICONDUCTOR DEVICE WITH SOURCE RESISTOR

HIGH VOLTAGE GUARD RING SEMICONDUCTOR DEVICE AND METHOD OF FORMING...

POWER ON CONTROL CIRCUITS AND METHODS OF OPERATING THE SAME

SEMICONDUCTOR DEVICE WITH SOURCE RESISTOR AND MANUFACTURING METHOD...

DEVICE FOR TEMPERATURE MONITORING OF A SEMICONDUCTOR DEVICE

INTEGRATED CIRCUIT DEVICE, METHOD, LAYOUT, AND SYSTEM

DEVICE AND METHOD FOR TEMPERATURE MONITORING OF A SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE WITH SOURCE RESISTOR AND MANUFACTURING METHOD...

IC DEGRADATION MANAGEMENT CIRCUIT, SYSTEM AND METHOD

UNI-GATE CELL DESIGN

OUTPUT RESISTANCE TESTING INTEGRATED CIRCUIT

OUTPUT RESISTANCE TESTING METHOD

TIME TO CURRENT CONVERTER

IC DEGRADATION MANAGEMENT CIRCUIT, SYSTEM AND METHOD

OUTPUT RESISTANCE TESTING STRUCTURE AND METHOD OF USING THE SAME

FinFET with Embedded MOS Varactor and Method of Making Same

LOW gds MEASUREMENT METHODOLOGY FOR MOS

NEARLY BUFFER ZONE FREE LAYOUT METHODOLOGY

THREE-DIMENSIONAL IMAGE APPARATUS AND OPERATION METHOD THEREOF

FinFET with Embedded MOS Varactor and Method of Making Same

Nearly Buffer Zone Free Layout Methodology

SEMICONDUCTOR DEVICE FEATURE DENSITY GRADIENT VERIFICATION

SEMICONDUCTOR DEVICE FEATURE DENSITY GRADIENT VERIFICATION

Semiconductor Mismatch Reduction

INPUT/OUTPUT DEVICE AND HUMAN-MACHINE INTERACTION SYSTEM AND METHOD...