Poh Thiam Teoh

Person

Kuala Lumpur, MY

People

Patents Grantslast 30 patents

Information Patent Grant
Hardware mechanisms for link encryption
- Patent number 11,533,170
- Issue date Dec 20, 2022
- Intel Corporation
- Reouven Elbaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timer control for peripheral component interconnect express compone...
- Patent number 11,132,319
- Issue date Sep 28, 2021
- Intel Corporation
- Christopher Wing Hong Ngau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and system for power management on a CPU die via...
- Patent number 11,016,549
- Issue date May 25, 2021
- Intel Corporation
- Poh Thiam Teoh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing hardware precision time measurement inaccuracy
- Patent number 10,257,825
- Issue date Apr 9, 2019
- Intel Corporation
- Say Cheong Gan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for power management
- Patent number 10,248,183
- Issue date Apr 2, 2019
- Intel Corporation
- Jennifer Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques enabling low power states for a communications port
- Patent number 10,209,911
- Issue date Feb 19, 2019
- Intel Corporation
- Jennifer Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Active state power management (ASPM) to reduce power consumption by...
- Patent number 9,632,557
- Issue date Apr 25, 2017
- Intel Corporation
- Poh Thiam Teoh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor hiding its power-up latency with activation of a root por...
- Patent number 9,563,256
- Issue date Feb 7, 2017
- Intel Corporation
- Sun Zheng E
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and system to handle transactions received after...
- Patent number 9,558,030
- Issue date Jan 31, 2017
- Intel Corporation
- Su Wei Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for power management
- Patent number 9,513,662
- Issue date Dec 6, 2016
- Intel Corporation
- Jennifer Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for clock frequency ratio independent error lo...
- Patent number 9,489,008
- Issue date Nov 8, 2016
- Intel Corporation
- Ming Yi Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for multiple bus master engines to share the same request...
- Patent number 9,367,500
- Issue date Jun 14, 2016
- Intel Corporation
- Ngek Leong Guok
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Power mangement techniques for an input/output (I/O) subsystem
- Patent number 9,270,555
- Issue date Feb 23, 2016
- Intel Corporation
- Poh Thiam Teoh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for agent interfacing with pipeline backbone t...
- Patent number 9,268,568
- Issue date Feb 23, 2016
- Intel Corporation
- Ngek Leong Guok
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Power management in a bridge based on a second derivative value der...
- Patent number 9,176,554
- Issue date Nov 3, 2015
- Intel Corporation
- Poh Thiam Teoh
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Link equalization mechanism
- Patent number 9,124,455
- Issue date Sep 1, 2015
- Intel Corporation
- Su Wei Lim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Controllable transaction synchronization for merging peripheral dev...
- Patent number 8,601,198
- Issue date Dec 3, 2013
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MITIGATION OF SIDE CHANNEL ATTACKS ON PLATFORM INTERCONNECTS USING...
- Publication number 20240106644
- Publication date Mar 28, 2024
- Intel Corporation
- Aditya Katragada
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TIMER CONTROL FOR PERIPHERAL COMPONENT INTERCONNECT EXPRESS COMPONE...
- Publication number 20210382839
- Publication date Dec 9, 2021
- Intel Corporation
- Christopher Wing Hong Ngau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE MECHANISMS FOR LINK ENCRYPTION
- Publication number 20190229901
- Publication date Jul 25, 2019
- Intel Corporation
- Reouven Elbaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR POWER MANAGEMENT ON A CPU DIE VIA...
- Publication number 20190041936
- Publication date Feb 7, 2019
- Poh Thiam Teoh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMER CONTROL FOR PERIPHERAL COMPONENT INTERCONNECT EXPRESS COMPONE...
- Publication number 20190042510
- Publication date Feb 7, 2019
- Christopher Wing Hong Ngau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING HARDWARE PRECISION TIME MEASUREMENT INACCURACY
- Publication number 20180098320
- Publication date Apr 5, 2018
- Intel Corporation
- Say Cheong Gan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR POWER MANAGEMENT
- Publication number 20170083079
- Publication date Mar 23, 2017
- Intel Corporation
- Jennifer Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES ENABLING LOW POWER STATES FOR A COMMUNICATIONS PORT
- Publication number 20160231958
- Publication date Aug 11, 2016
- Intel Corporation
- Jennifer CHIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS FOR MULTIPLE BUS MASTER ENGINES TO SHARE THE SAME REQUEST...
- Publication number 20140207986
- Publication date Jul 24, 2014
- Ngek Leong Guok
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR PROVIDING POWER SAVINGS IN A PROCESSOR ENVIRO...
- Publication number 20140195835
- Publication date Jul 10, 2014
- Sun Zheng E.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR POWER MANAGEMENT
- Publication number 20140195830
- Publication date Jul 10, 2014
- Jennifer Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CLOCK FREQUENCY RATIO INDEPENDENT ERROR LO...
- Publication number 20130283084
- Publication date Oct 24, 2013
- Ming Yi Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR AGENT INTERFACING WITH PIPELINE BACKBONE T...
- Publication number 20130283013
- Publication date Oct 24, 2013
- Ngek Leong Guok
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM TO HANDLE TRANSACTIONS RECEIVED AFTER...
- Publication number 20130275985
- Publication date Oct 17, 2013
- Intel Corporation
- Su Wei Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANGEMENT TECHNIQUES FOR AN INPUT/OUTPUT (I/O) SUBSYSTEM
- Publication number 20130003540
- Publication date Jan 3, 2013
- Poh Thiam Teoh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CONTROLLABLE TRANSACTION SYNCHRONIZATION FOR PERIPHERAL DEVICES
- Publication number 20130007332
- Publication date Jan 3, 2013
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING

Poh Thiam Teoh

Person

Patents Grantslast 30 patents

Hardware mechanisms for link encryption

Timer control for peripheral component interconnect express compone...

Method, apparatus, and system for power management on a CPU die via...

Reducing hardware precision time measurement inaccuracy

System and method for power management

Techniques enabling low power states for a communications port

Active state power management (ASPM) to reduce power consumption by...

Processor hiding its power-up latency with activation of a root por...

Method, apparatus, and system to handle transactions received after...

System and method for power management

Method and apparatus for clock frequency ratio independent error lo...

Apparatus for multiple bus master engines to share the same request...

Power mangement techniques for an input/output (I/O) subsystem

Method and apparatus for agent interfacing with pipeline backbone t...

Power management in a bridge based on a second derivative value der...

Link equalization mechanism

Controllable transaction synchronization for merging peripheral dev...

Patents Applicationslast 30 patents

MITIGATION OF SIDE CHANNEL ATTACKS ON PLATFORM INTERCONNECTS USING...

TIMER CONTROL FOR PERIPHERAL COMPONENT INTERCONNECT EXPRESS COMPONE...

HARDWARE MECHANISMS FOR LINK ENCRYPTION

METHOD, APPARATUS, AND SYSTEM FOR POWER MANAGEMENT ON A CPU DIE VIA...

TIMER CONTROL FOR PERIPHERAL COMPONENT INTERCONNECT EXPRESS COMPONE...

REDUCING HARDWARE PRECISION TIME MEASUREMENT INACCURACY

SYSTEM AND METHOD FOR POWER MANAGEMENT

TECHNIQUES ENABLING LOW POWER STATES FOR A COMMUNICATIONS PORT

APPARATUS FOR MULTIPLE BUS MASTER ENGINES TO SHARE THE SAME REQUEST...

SYSTEM AND METHOD FOR PROVIDING POWER SAVINGS IN A PROCESSOR ENVIRO...

SYSTEM AND METHOD FOR POWER MANAGEMENT

METHOD AND APPARATUS FOR CLOCK FREQUENCY RATIO INDEPENDENT ERROR LO...

METHOD AND APPARATUS FOR AGENT INTERFACING WITH PIPELINE BACKBONE T...

METHOD, APPARATUS, AND SYSTEM TO HANDLE TRANSACTIONS RECEIVED AFTER...

POWER MANGEMENT TECHNIQUES FOR AN INPUT/OUTPUT (I/O) SUBSYSTEM

CONTROLLABLE TRANSACTION SYNCHRONIZATION FOR PERIPHERAL DEVICES