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Praful Jain
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Los Gatos, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Forming and/or configuring stacked dies
Patent number
11,961,823
Issue date
Apr 16, 2024
Xilinx, Inc.
Praful Jain
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Power distribution for active-on-active die stack with reduced resi...
Patent number
11,670,585
Issue date
Jun 6, 2023
Xilinx, Inc.
Praful Jain
C12 - BIOCHEMISTRY BEER SPIRITS WINE VINEGAR MICROBIOLOGY ENZYMOLOGY MUTATION...
Information
Patent Grant
Power delivery network for active-on-active stacked integrated circ...
Patent number
11,270,977
Issue date
Mar 8, 2022
Xilinx, Inc.
Praful Jain
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Forming and/or configuring stacked dies
Patent number
11,043,480
Issue date
Jun 22, 2021
Xilinx, Inc.
Praful Jain
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Power distribution for active-on-active die stack with reduced resi...
Patent number
11,041,211
Issue date
Jun 22, 2021
Xilinx, Inc.
Praful Jain
C12 - BIOCHEMISTRY BEER SPIRITS WINE VINEGAR MICROBIOLOGY ENZYMOLOGY MUTATION...
Information
Patent Grant
Integrated circuits designed for multiple sets of criteria
Patent number
10,908,598
Issue date
Feb 2, 2021
Xilinx, Inc.
Praful Jain
G05 - CONTROLLING REGULATING
Information
Patent Grant
Interconnect circuits having low threshold voltage P-channel transi...
Patent number
9,628,081
Issue date
Apr 18, 2017
Xilinx, Inc.
Praful Jain
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Selection of logic paths for redundancy
Patent number
9,484,919
Issue date
Nov 1, 2016
Xilinx, Inc.
Praful Jain
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Circuit design-specific failure in time rate for single event upsets
Patent number
9,483,599
Issue date
Nov 1, 2016
Xilinx, Inc.
Praful Jain
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Master-slave flip-flops and methods of implementing master-slave fl...
Patent number
9,281,807
Issue date
Mar 8, 2016
Xilinx, Inc.
Pierre Maillard
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Single-event upset mitigation in circuit design for programmable in...
Patent number
9,183,338
Issue date
Nov 10, 2015
Xilinx, Inc.
Praful Jain
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
Information
Patent Application
SYSTEMS AND METHODS FOR MACHINE LEARNING BASED VOLTAGE DROP PREDICT...
Publication number
20250036848
Publication date
Jan 30, 2025
Xilinx, Inc.
Aashish TRIPATHI
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
BUILDING MULTI-DIE FPGAS USING CHIP-ON-WAFER TECHNOLOGY
Publication number
20240429145
Publication date
Dec 26, 2024
Xilinx, Inc.
Praful JAIN
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
POWER DELIVERY NETWORK FOR ACTIVE-ON-ACTIVE STACKED INTEGRATED CIRC...
Publication number
20210143127
Publication date
May 13, 2021
Xilinx, Inc.
Praful JAIN
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
POWER DISTRIBUTION FOR ACTIVE-ON-ACTIVE DIE STACK WITH REDUCED RESI...
Publication number
20190259702
Publication date
Aug 22, 2019
Xilinx, Inc.
Praful Jain
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
INTERCONNECT CIRCUITS HAVING LOW THRESHOLD VOLTAGE P-CHANNEL TRANSI...
Publication number
20160049940
Publication date
Feb 18, 2016
Xilinx, Inc.
Praful Jain
H01 - BASIC ELECTRIC ELEMENTS