Pramod Kolar

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Negative bitline write assist circuit and method for operating the...
- Patent number 10,902,893
- Issue date Jan 26, 2021
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative bitline write assist circuit and method for operating the...
- Patent number 10,818,326
- Issue date Oct 27, 2020
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacitive wordline boosting
- Patent number 10,002,654
- Issue date Jun 19, 2018
- Intel Corporation
- Jaydeep P Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative bitline write assist circuit and method for operating the...
- Patent number 9,818,460
- Issue date Nov 14, 2017
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Grant
Read and write apparatus and method for a dual port memory
- Patent number 9,812,189
- Issue date Nov 7, 2017
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Grant
Operation aware auto-feedback SRAM
- Patent number 9,767,890
- Issue date Sep 19, 2017
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual-port static random access memory (SRAM)
- Patent number 9,607,687
- Issue date Mar 28, 2017
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative bitline write assist circuit and method for operating the...
- Patent number 9,378,788
- Issue date Jun 28, 2016
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual-port static random access memory (SRAM)
- Patent number 9,208,853
- Issue date Dec 8, 2015
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive and dynamic stability enhancement for memories
- Patent number 8,451,670
- Issue date May 28, 2013
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NEGATIVE BITLINE WRITE ASSIST CIRCUIT AND METHOD FOR OPERATING THE...
- Publication number 20180226109
- Publication date Aug 9, 2018
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Application
NEGATIVE BITLINE WRITE ASSIST CIRCUIT AND METHOD FOR OPERATING THE...
- Publication number 20180082722
- Publication date Mar 22, 2018
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Application
CAPACITIVE WORDLINE BOOSTING
- Publication number 20160379694
- Publication date Dec 29, 2016
- Intel Corporation
- JAYDEREP KULKARNI
- G11 - INFORMATION STORAGE
Information Patent Application
NEGATIVE BITLINE WRITE ASSIST CIRCUIT AND METHOD FOR OPERATING THE...
- Publication number 20160267952
- Publication date Sep 15, 2016
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL-PORT STATIC RANDOM ACCESS MEMORY (SRAM)
- Publication number 20160078926
- Publication date Mar 17, 2016
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL-PORT STATIC RANDOM ACCESS MEMORY (SRAM)
- Publication number 20140269019
- Publication date Sep 18, 2014
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Application
OPERATION AWARE AUTO-FEEDBACK SRAM
- Publication number 20140169077
- Publication date Jun 19, 2014
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Application
NEGATIVE BITLINE WRITE ASSIST CIRCUIT AND METHOD FOR OPERATING THE...
- Publication number 20140169106
- Publication date Jun 19, 2014
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Application
Adaptive and Dynamic Stability Enhancement for Memories
- Publication number 20120075938
- Publication date Mar 29, 2012
- Pramod Kolar
- G11 - INFORMATION STORAGE

Pramod Kolar

Person

Patents Grantslast 30 patents

Negative bitline write assist circuit and method for operating the...

Negative bitline write assist circuit and method for operating the...

Capacitive wordline boosting

Negative bitline write assist circuit and method for operating the...

Read and write apparatus and method for a dual port memory

Operation aware auto-feedback SRAM

Dual-port static random access memory (SRAM)

Negative bitline write assist circuit and method for operating the...

Dual-port static random access memory (SRAM)

Adaptive and dynamic stability enhancement for memories

Patents Applicationslast 30 patents

NEGATIVE BITLINE WRITE ASSIST CIRCUIT AND METHOD FOR OPERATING THE...

NEGATIVE BITLINE WRITE ASSIST CIRCUIT AND METHOD FOR OPERATING THE...

CAPACITIVE WORDLINE BOOSTING

NEGATIVE BITLINE WRITE ASSIST CIRCUIT AND METHOD FOR OPERATING THE...

DUAL-PORT STATIC RANDOM ACCESS MEMORY (SRAM)

DUAL-PORT STATIC RANDOM ACCESS MEMORY (SRAM)

OPERATION AWARE AUTO-FEEDBACK SRAM

NEGATIVE BITLINE WRITE ASSIST CIRCUIT AND METHOD FOR OPERATING THE...

Adaptive and Dynamic Stability Enhancement for Memories