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Pranav Bhushan
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San Jose, CA, US
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Patents Grants
last 30 patents
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Patent Grant
Method and apparatus for AMS simulation of integrated circuit design
Patent number
8,661,402
Issue date
Feb 25, 2014
Cadence Design Systems, Inc.
Pranav Bhushan
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and apparatus for AMS simulation of integrated circuit design
Patent number
8,578,322
Issue date
Nov 5, 2013
Cadence Design Systems, Inc.
Pranav Bhushan
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and apparatus for AMS simulation of integrated circuit design
Patent number
8,201,137
Issue date
Jun 12, 2012
Cadence Design Systems, Inc.
Pranav Bhushan
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
Information
Patent Application
METHOD AND APPARATUS FOR AMS SIMULATION OF INTEGRATED CIRCUIT DESIGN
Publication number
20120198411
Publication date
Aug 2, 2012
Cadence Design Systems, Inc.
Pranav Bhushan
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
METHOD AND APPARATUS FOR AMS SIMULATION OF INTEGRATED CIRCUIT DESIGN
Publication number
20120198405
Publication date
Aug 2, 2012
Cadence Design Systems, Inc.
Pranav Bhushan
G06 - COMPUTING CALCULATING COUNTING