Prashant Kenkare

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for providing an area efficient and design rule c...
- Patent number 10,003,325
- Issue date Jun 19, 2018
- Samsung Electronics Co., Ltd.
- Sumeer Goel
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method and apparatus for read assist to achieve robust static rando...
- Patent number 9,697,889
- Issue date Jul 4, 2017
- Samsung Electronics Co., Ltd.
- Kevin E. Klein
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual supply memory
- Patent number 9,647,453
- Issue date May 9, 2017
- Samsung Electronics Co., Ltd.
- Prashant Kenkare
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Static random access memory with bitline boost
- Patent number 9,460,778
- Issue date Oct 4, 2016
- Samsung Electronics Co., Ltd.
- Jin Seung Son
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated clock gater (ICG) using clock cascode complimentary swit...
- Patent number 9,450,578
- Issue date Sep 20, 2016
- Samsung Electronics Co., Ltd.
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage level shifter and systems implementing the same
- Patent number 9,337,840
- Issue date May 10, 2016
- Samsung Electronics Co., Ltd.
- Jin Seung Son
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
SRAM wordline driver supply block with multiple modes
- Patent number 9,330,751
- Issue date May 3, 2016
- Samsung Electronics Co., Ltd.
- Shahnaz Nagle
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor circuit
- Patent number 9,312,857
- Issue date Apr 12, 2016
- Samsung Electronics Co., Ltd.
- Min-Su Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated clock gater (ICG) using clock cascode complimentary swit...
- Patent number 9,203,382
- Issue date Dec 1, 2015
- Samsung Electronics Co., Ltd.
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flip-flop having shared feedback and method of operation
- Patent number 9,059,687
- Issue date Jun 16, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory management unit tag memory
- Patent number 9,021,194
- Issue date Apr 28, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated clock gater (ICG) using clock cascode complimentary swit...
- Patent number 8,975,949
- Issue date Mar 10, 2015
- Samsung Electronics Co., Ltd.
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for memory array access with fast address decoder
- Patent number 8,943,292
- Issue date Jan 27, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flip-flop having shared feedback and method of operation
- Patent number 8,791,739
- Issue date Jul 29, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit having memory repair information storage and met...
- Patent number 8,634,263
- Issue date Jan 21, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Prashant U. Kenkare
- G11 - INFORMATION STORAGE
Information Patent Grant
Sequential digital circuitry with test scan
- Patent number 8,484,523
- Issue date Jul 9, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit memory having assisted access and method therefor
- Patent number 8,315,117
- Issue date Nov 20, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage-based memory size scaling in a data processing system
- Patent number 8,156,357
- Issue date Apr 10, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Flip-flop having shared feedback and method of operation
- Patent number 8,143,929
- Issue date Mar 27, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory having negative voltage write assist circuit and method ther...
- Patent number 8,120,975
- Issue date Feb 21, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Prashant U. Kenkare
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory using multiple supply voltages
- Patent number 8,059,482
- Issue date Nov 15, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Andrew C. Russell
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit having boosted array voltage and method therefor
- Patent number 8,031,549
- Issue date Oct 4, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Prashant U. Kenkare
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Memory with read cycle write back
- Patent number 8,009,489
- Issue date Aug 30, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM with read and write assist
- Patent number 8,004,907
- Issue date Aug 23, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Andrew C. Russell
- G11 - INFORMATION STORAGE
Information Patent Grant
Pipelined tag and information array access with speculative retriev...
- Patent number 7,984,229
- Issue date Jul 19, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
System having a memory voltage controller which varies an operating...
- Patent number 7,870,400
- Issue date Jan 11, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Prashant U. Kenkare
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Memory with reduced power supply voltage for a write operation
- Patent number 7,864,617
- Issue date Jan 4, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Prashant Kenkare
- G11 - INFORMATION STORAGE
Information Patent Grant
Data latch with structural hold
- Patent number 7,843,218
- Issue date Nov 30, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- G01 - MEASURING TESTING
Information Patent Grant
Low voltage memory device and method thereof
- Patent number 7,675,806
- Issue date Mar 9, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Bradford Hunter
- G11 - INFORMATION STORAGE
Information Patent Grant
Single-supply, single-ended level conversion circuit for an integra...
- Patent number 7,671,629
- Issue date Mar 2, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Shayan Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD FOR PROVIDING AN AREA EFFICIENT AND DESIGN RULE C...
- Publication number 20180034448
- Publication date Feb 1, 2018
- Samsung Electronics Co., Ltd.
- Sumeer GOEL
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED CLOCK GATER (ICG) USING CLOCK CASCODE COMPLIMENTARY SWIT...
- Publication number 20160049930
- Publication date Feb 18, 2016
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor Circuit
- Publication number 20150263730
- Publication date Sep 17, 2015
- Min-Su Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SRAM WORDLINE DRIVER SUPPLY BLOCK WITH MULTIPLE MODES
- Publication number 20150194208
- Publication date Jul 9, 2015
- Shahnaz NAGLE
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CLOCK GATER (ICG) USING CLOCK CASCODE COMPLIMENTARY SWIT...
- Publication number 20150145577
- Publication date May 28, 2015
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
STATIC RANDOM ACCESS MEMORY
- Publication number 20150049540
- Publication date Feb 19, 2015
- Samsung Electronics Co., Ltd.
- Jin Seung SON
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL SUPPLY MEMORY
- Publication number 20150036446
- Publication date Feb 5, 2015
- Prashant KENKARE
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE LEVEL SHIFTER AND SYSTEMS IMPLEMENTING THE SAME
- Publication number 20140340119
- Publication date Nov 20, 2014
- Samsung Electronics Co., Ltd.
- Jin Seung SON
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FLIP-FLOP HAVING SHARED FEEDBACK AND METHOD OF OPERATION
- Publication number 20140306745
- Publication date Oct 16, 2014
- Freescale Semiconductor Inc.
- RAVINDRARAJ RAMARAJU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED CLOCK GATER (ICG) USING CLOCK CASCODE COMPLIMENTARY SWIT...
- Publication number 20140266396
- Publication date Sep 18, 2014
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Memory Management Unit Tag Memory
- Publication number 20130046928
- Publication date Feb 21, 2013
- Ravindraraj Ramaraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEQUENTIAL DIGITAL CIRCUITRY WITH TEST SCAN
- Publication number 20110239069
- Publication date Sep 29, 2011
- Ravindraraj Ramaraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLIP-FLOP HAVING SHARED FEEDBACK AND METHOD OF OPERATION
- Publication number 20110095799
- Publication date Apr 28, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FLIP-FLOP HAVING SHARED FEEDBACK AND METHOD OF OPERATION
- Publication number 20110095800
- Publication date Apr 28, 2011
- Ravindraraj Ramaraju
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY USING MULTIPLE SUPPLY VOLTAGES
- Publication number 20100322027
- Publication date Dec 23, 2010
- Andrew C. Russell
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM WITH READ AND WRITE ASSIST
- Publication number 20100309736
- Publication date Dec 9, 2010
- Andrew C. Russell
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH READ CYCLE WRITE BACK
- Publication number 20100302837
- Publication date Dec 2, 2010
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT HAVING MEMORY REPAIR INFORMATION STORAGE AND MET...
- Publication number 20100277990
- Publication date Nov 4, 2010
- Prashant U. Kenkare
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT MEMORY HAVING ASSISTED ACCESS AND METHOD THEREFOR
- Publication number 20100246298
- Publication date Sep 30, 2010
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH REDUCED POWER SUPPLY VOLTAGE FOR A WRITE OPERATION
- Publication number 20100208529
- Publication date Aug 19, 2010
- Prashant Kenkare
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE-BASED MEMORY SIZE SCALING IN A DATA PROCESSING SYSTEM
- Publication number 20100191990
- Publication date Jul 29, 2010
- Shayan Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY HAVING NEGATIVE VOLTAGE WRITE ASSIST CIRCUIT AND METHOD THER...
- Publication number 20100188909
- Publication date Jul 29, 2010
- Prashant U. Kenkare
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT HAVING BOOSTED ARRAY VOLTAGE AND METHOD THEREFOR
- Publication number 20100072816
- Publication date Mar 25, 2010
- Prashant U. Kenkare
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Application
SINGLE-SUPPLY, SINGLE-ENDED LEVEL CONVERSION CIRCUIT FOR AN INTEGRA...
- Publication number 20090251173
- Publication date Oct 8, 2009
- Shayan Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ONE TIME PROGRAMMABLE ELEMENT SYSTEM IN AN INTEGRATED CIRCUIT
- Publication number 20080304347
- Publication date Dec 11, 2008
- Prashant U. Kenkare
- G11 - INFORMATION STORAGE
Information Patent Application
BITCELL WITH VARIABLE-CONDUCTANCE TRANSFER GATE AND METHOD THEREOF
- Publication number 20080291768
- Publication date Nov 27, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Application
PIPELINED TAG AND INFORMATION ARRAY ACCESS WITH SPECULATIVE RETRIEV...
- Publication number 20080222361
- Publication date Sep 11, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE PORT MEMORY WITH PRIORITIZED WORD LINE DRIVER AND METHOD T...
- Publication number 20080198681
- Publication date Aug 21, 2008
- Prashant U. Kenkare
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM HAVING A MEMORY VOLTAGE CONTROLLER AND METHOD THEREFOR
- Publication number 20080162951
- Publication date Jul 3, 2008
- Prashant U. Kenkare
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH INCREASED WRITE MARGIN BITCELLS
- Publication number 20080117666
- Publication date May 22, 2008
- Andrew C. Russell
- G11 - INFORMATION STORAGE

Prashant Kenkare

Person

Patents Grantslast 30 patents

System and method for providing an area efficient and design rule c...

Method and apparatus for read assist to achieve robust static rando...

Dual supply memory

Static random access memory with bitline boost

Integrated clock gater (ICG) using clock cascode complimentary swit...

Voltage level shifter and systems implementing the same

SRAM wordline driver supply block with multiple modes

Semiconductor circuit

Integrated clock gater (ICG) using clock cascode complimentary swit...

Flip-flop having shared feedback and method of operation

Memory management unit tag memory

Integrated clock gater (ICG) using clock cascode complimentary swit...

System and method for memory array access with fast address decoder

Flip-flop having shared feedback and method of operation

Integrated circuit having memory repair information storage and met...

Sequential digital circuitry with test scan

Integrated circuit memory having assisted access and method therefor

Voltage-based memory size scaling in a data processing system

Flip-flop having shared feedback and method of operation

Memory having negative voltage write assist circuit and method ther...

Memory using multiple supply voltages

Integrated circuit having boosted array voltage and method therefor

Memory with read cycle write back

SRAM with read and write assist

Pipelined tag and information array access with speculative retriev...

System having a memory voltage controller which varies an operating...

Memory with reduced power supply voltage for a write operation

Data latch with structural hold

Low voltage memory device and method thereof

Single-supply, single-ended level conversion circuit for an integra...

Patents Applicationslast 30 patents

SYSTEM AND METHOD FOR PROVIDING AN AREA EFFICIENT AND DESIGN RULE C...

INTEGRATED CLOCK GATER (ICG) USING CLOCK CASCODE COMPLIMENTARY SWIT...

Semiconductor Circuit

SRAM WORDLINE DRIVER SUPPLY BLOCK WITH MULTIPLE MODES

INTEGRATED CLOCK GATER (ICG) USING CLOCK CASCODE COMPLIMENTARY SWIT...

STATIC RANDOM ACCESS MEMORY

DUAL SUPPLY MEMORY

VOLTAGE LEVEL SHIFTER AND SYSTEMS IMPLEMENTING THE SAME

FLIP-FLOP HAVING SHARED FEEDBACK AND METHOD OF OPERATION

INTEGRATED CLOCK GATER (ICG) USING CLOCK CASCODE COMPLIMENTARY SWIT...

Memory Management Unit Tag Memory

SEQUENTIAL DIGITAL CIRCUITRY WITH TEST SCAN

FLIP-FLOP HAVING SHARED FEEDBACK AND METHOD OF OPERATION

FLIP-FLOP HAVING SHARED FEEDBACK AND METHOD OF OPERATION

MEMORY USING MULTIPLE SUPPLY VOLTAGES

SRAM WITH READ AND WRITE ASSIST

MEMORY WITH READ CYCLE WRITE BACK

INTEGRATED CIRCUIT HAVING MEMORY REPAIR INFORMATION STORAGE AND MET...

INTEGRATED CIRCUIT MEMORY HAVING ASSISTED ACCESS AND METHOD THEREFOR

MEMORY WITH REDUCED POWER SUPPLY VOLTAGE FOR A WRITE OPERATION

VOLTAGE-BASED MEMORY SIZE SCALING IN A DATA PROCESSING SYSTEM

MEMORY HAVING NEGATIVE VOLTAGE WRITE ASSIST CIRCUIT AND METHOD THER...

INTEGRATED CIRCUIT HAVING BOOSTED ARRAY VOLTAGE AND METHOD THEREFOR

SINGLE-SUPPLY, SINGLE-ENDED LEVEL CONVERSION CIRCUIT FOR AN INTEGRA...

ONE TIME PROGRAMMABLE ELEMENT SYSTEM IN AN INTEGRATED CIRCUIT

BITCELL WITH VARIABLE-CONDUCTANCE TRANSFER GATE AND METHOD THEREOF

PIPELINED TAG AND INFORMATION ARRAY ACCESS WITH SPECULATIVE RETRIEV...

MULTIPLE PORT MEMORY WITH PRIORITIZED WORD LINE DRIVER AND METHOD T...

SYSTEM HAVING A MEMORY VOLTAGE CONTROLLER AND METHOD THEREFOR

MEMORY WITH INCREASED WRITE MARGIN BITCELLS