Prashant S. Damle

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Cross-point memory read technique to mitigate drift errors
- Patent number 12,230,346
- Issue date Feb 18, 2025
- Intel Corporation
- Hemant P. Rao
- G11 - INFORMATION STORAGE
Information Patent Grant
Write disturb refresh rate reduction using write history buffer
- Patent number 11,404,105
- Issue date Aug 2, 2022
- Intel Corporation
- Akanksha Mehta
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced uncorrectable memory errors
- Patent number 10,936,418
- Issue date Mar 2, 2021
- Intel Corporation
- Kiran Pangal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for adjusting demarcation voltages based on cy...
- Patent number 10,777,271
- Issue date Sep 15, 2020
- Intel Corporation
- Wei Fang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory preset adjustment based on adaptive calibration
- Patent number 10,679,698
- Issue date Jun 9, 2020
- Intel Corporation
- Prashant S. Damle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing silent data errors in non-volatil...
- Patent number 10,331,345
- Issue date Jun 25, 2019
- Intel Corporation
- Wei Fang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced uncorrectable memory errors
- Patent number 10,324,793
- Issue date Jun 18, 2019
- Intel Corporation
- Kiran Pangal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Time tracking with patrol scrub
- Patent number 10,310,989
- Issue date Jun 4, 2019
- Intel Corporation
- Philip Hillier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing disturbance induced errors
- Patent number 10,153,015
- Issue date Dec 11, 2018
- Intel Corporation
- Prashant S. Damle
- G11 - INFORMATION STORAGE
Information Patent Grant
Managing threshold voltage shift in nonvolatile memory
- Patent number 10,056,139
- Issue date Aug 21, 2018
- Intel Corporation
- Shekoufeh Qawami
- G11 - INFORMATION STORAGE
Information Patent Grant
Determining demarcation voltage via timestamps
- Patent number 9,934,859
- Issue date Apr 3, 2018
- Intel Corporation
- Muthukumar P. Swaminathan
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced uncorrectable memory errors
- Patent number 9,934,088
- Issue date Apr 3, 2018
- Intel Corporation
- Kiran Pangal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus to reduce threshold voltage drift
- Patent number 9,824,767
- Issue date Nov 21, 2017
- Intel Corporation
- Davide Mantegazza
- G11 - INFORMATION STORAGE
Information Patent Grant
Managing disturbance induced errors
- Patent number 9,792,963
- Issue date Oct 17, 2017
- Intel Corporation
- Prashant S. Damle
- G11 - INFORMATION STORAGE
Information Patent Grant
Managing threshold voltage shift in nonvolatile memory
- Patent number 9,721,657
- Issue date Aug 1, 2017
- Intel Corporation
- Shekoufeh Qawami
- G11 - INFORMATION STORAGE
Information Patent Grant
Error correction in non—volatile memory
- Patent number 9,619,324
- Issue date Apr 11, 2017
- Intel Corporation
- Zion S. Kwok
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Set and reset operation in phase change memory and associated techn...
- Patent number 9,613,698
- Issue date Apr 4, 2017
- Intel Corporation
- Davide Mantegazza
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for drift cancellation in a memory
- Patent number 9,613,691
- Issue date Apr 4, 2017
- Intel Corporation
- Davide Mantegazza
- G11 - INFORMATION STORAGE
Information Patent Grant
Flexible wear management for non-volatile memory
- Patent number 9,501,405
- Issue date Nov 22, 2016
- Intel Corporation
- Prashant S. Damle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Threshold voltage expansion
- Patent number 9,384,801
- Issue date Jul 5, 2016
- Intel Corporation
- Abhinav Pandey
- G11 - INFORMATION STORAGE
Information Patent Grant
Set and reset operation in phase change memory and associated techn...
- Patent number 9,368,205
- Issue date Jun 14, 2016
- Intel Corporation
- Davide Mantegazza
- G11 - INFORMATION STORAGE
Information Patent Grant
Mitigating read disturb in a cross-point memory
- Patent number 9,286,975
- Issue date Mar 15, 2016
- Intel Corporation
- Daniel J. Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Managing disturbance induced errors
- Patent number 9,202,547
- Issue date Dec 1, 2015
- Intel Corporation
- Prashant S. Damle
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced uncorrectable memory errors
- Patent number 9,136,873
- Issue date Sep 15, 2015
- Intel Corporation
- Kiran Pangal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Isolating, at least in part, local row or column circuitry of memor...
- Patent number 9,030,906
- Issue date May 12, 2015
- Intel Corporation
- Doyle Rivers
- G11 - INFORMATION STORAGE
Information Patent Grant
Flexible wear management for non-volatile memory
- Patent number 9,032,137
- Issue date May 12, 2015
- Intel Corporation
- Prashant S. Damle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device having improved programming operation
- Patent number 8,705,290
- Issue date Apr 22, 2014
- Micron Technology, Inc.
- Prashant S. Damle
- G11 - INFORMATION STORAGE
Information Patent Grant
Independent well bias management in a memory device
- Patent number 8,498,159
- Issue date Jul 30, 2013
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having improved programming operation
- Patent number 8,331,160
- Issue date Dec 11, 2012
- Micron Technology, Inc.
- Prashant S. Damle
- G11 - INFORMATION STORAGE
Information Patent Grant
Independent well bias management in a memory device
- Patent number 8,174,893
- Issue date May 8, 2012
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CROSS-POINT MEMORY READ TECHNIQUE TO MITIGATE DRIFT ERRORS
- Publication number 20220415425
- Publication date Dec 29, 2022
- Intel Corporation
- Hemant P. RAO
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC WRITE SELECTION FOR SHELF-LIFE RETENTION IN NON-VOLATILE ME...
- Publication number 20220383941
- Publication date Dec 1, 2022
- Rakan Maddah
- G11 - INFORMATION STORAGE
Information Patent Application
VELOCITY BASED WRITE DISTURB REFRESH
- Publication number 20220382465
- Publication date Dec 1, 2022
- Intel Corporation
- Rakan Maddah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE WRITE CURRENT ADJUSTMENT FOR PERSISTENT MEMORIES
- Publication number 20220359030
- Publication date Nov 10, 2022
- Yuanyuan Li
- G11 - INFORMATION STORAGE
Information Patent Application
NEAR MISS-BASED REFRESH FOR READ DISTURB MITIGATION
- Publication number 20210193248
- Publication date Jun 24, 2021
- Intel Corporation
- Lunkai ZHANG
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE DISTURB REFRESH RATE REDUCTION USING WRITE HISTORY BUFFER
- Publication number 20210110862
- Publication date Apr 15, 2021
- Intel Corporation
- Akanksha MEHTA
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES TO ACCESS NON-VOLATILE MEMORY USING DECK OFFSET
- Publication number 20200159424
- Publication date May 21, 2020
- Intel Corporation
- Ashir G. SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED UNCORRECTABLE MEMORY ERRORS
- Publication number 20190370112
- Publication date Dec 5, 2019
- Intel Corporation
- Kiran PANGAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR REDUCING SILENT DATA ERRORS IN NON-VOLATIL...
- Publication number 20190102088
- Publication date Apr 4, 2019
- Intel Corporation
- Wei Fang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR ADJUSTING DEMARCATION VOLTAGES BASED ON CY...
- Publication number 20190103160
- Publication date Apr 4, 2019
- Intel Corporation
- Wei Fang
- G11 - INFORMATION STORAGE
Information Patent Application
TIME TRACKING WITH PATROL SCRUB
- Publication number 20190102320
- Publication date Apr 4, 2019
- Intel Corporation
- Philip Hillier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY PRESET ADJUSTMENT BASED ON ADAPTIVE CALIBRATION
- Publication number 20190043571
- Publication date Feb 7, 2019
- Intel Corporation
- Prashant S. DAMLE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED UNCORRECTABLE MEMORY ERRORS
- Publication number 20180253355
- Publication date Sep 6, 2018
- Intel Corporation
- Kiran PANGAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING DISTURBANCE INDUCED ERRORS
- Publication number 20180068695
- Publication date Mar 8, 2018
- Intel Corporation
- Prashant S. DAMLE
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING THRESHOLD VOLTAGE SHIFT IN NONVOLATILE MEMORY
- Publication number 20170372780
- Publication date Dec 28, 2017
- Intel Corporation
- Shekoufeh Qawami
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR DRIFT CANCELLATION IN A MEMORY
- Publication number 20160284399
- Publication date Sep 29, 2016
- Intel Corporation
- Davide Mantegazza
- G11 - INFORMATION STORAGE
Information Patent Application
SET AND RESET OPERATION IN PHASE CHANGE MEMORY AND ASSOCIATED TECHN...
- Publication number 20160254052
- Publication date Sep 1, 2016
- Intel Corporation
- Davide Mantegazza
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING DISTURBANCE INDUCED ERRORS
- Publication number 20160189757
- Publication date Jun 30, 2016
- PRASHANT S. DAMLE
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCED UNCORRECTABLE MEMORY ERRORS
- Publication number 20160188409
- Publication date Jun 30, 2016
- Intel Corporation
- Kiran Pangal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THRESHOLD VOLTAGE EXPANSION
- Publication number 20160049209
- Publication date Feb 18, 2016
- Abhinav PANDEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE WEAR MANAGEMENT FOR NON-VOLATILE MEMORY
- Publication number 20150309926
- Publication date Oct 29, 2015
- Intel Corporation
- Prashant S. Damle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MITIGATING READ DISTURB IN A CROSS-POINT MEMORY
- Publication number 20150262661
- Publication date Sep 17, 2015
- Intel Corporation
- DANIEL J. CHU
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR CORRECTION IN NON_VOLATILE MEMORY
- Publication number 20150220387
- Publication date Aug 6, 2015
- Zion S. Kwok
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SET AND RESET OPERATION IN PHASE CHANGE MEMORY AND ASSOCIATED TECHN...
- Publication number 20150055407
- Publication date Feb 26, 2015
- Davide Mantegazza
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING DISTURBANCE INDUCED ERRORS
- Publication number 20140281203
- Publication date Sep 18, 2014
- PRASHANT S. DAMLE
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCED UNCORRECTABLE MEMORY ERRORS
- Publication number 20140258804
- Publication date Sep 11, 2014
- Kiran Pangal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE WEAR MANAGEMENT FOR NON-VOLATILE MEMORY
- Publication number 20140143474
- Publication date May 22, 2014
- Prashant S. Damle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques Associated with a Read and Write Window Budget for a Two...
- Publication number 20140089762
- Publication date Mar 27, 2014
- KIRAN PANGAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques Associated with Protecting System Critical Data Written...
- Publication number 20140089561
- Publication date Mar 27, 2014
- Kiran Pangal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ISOLATING, AT LEAST IN PART, LOCAL ROW OR COLUMN CIRCUITRY OF MEMOR...
- Publication number 20140016406
- Publication date Jan 16, 2014
- Doyle Rivers
- G11 - INFORMATION STORAGE

Prashant S. Damle

Person

Patents Grantslast 30 patents

Cross-point memory read technique to mitigate drift errors

Write disturb refresh rate reduction using write history buffer

Reduced uncorrectable memory errors

Method and apparatus for adjusting demarcation voltages based on cy...

Memory preset adjustment based on adaptive calibration

Method and apparatus for reducing silent data errors in non-volatil...

Reduced uncorrectable memory errors

Time tracking with patrol scrub

Managing disturbance induced errors

Managing threshold voltage shift in nonvolatile memory

Determining demarcation voltage via timestamps

Reduced uncorrectable memory errors

Methods and apparatus to reduce threshold voltage drift

Managing disturbance induced errors

Managing threshold voltage shift in nonvolatile memory

Error correction in non—volatile memory

Set and reset operation in phase change memory and associated techn...

Apparatus and method for drift cancellation in a memory

Flexible wear management for non-volatile memory

Threshold voltage expansion

Set and reset operation in phase change memory and associated techn...

Mitigating read disturb in a cross-point memory

Managing disturbance induced errors

Reduced uncorrectable memory errors

Isolating, at least in part, local row or column circuitry of memor...

Flexible wear management for non-volatile memory

Memory device having improved programming operation

Independent well bias management in a memory device

Memory device having improved programming operation

Independent well bias management in a memory device

Patents Applicationslast 30 patents

CROSS-POINT MEMORY READ TECHNIQUE TO MITIGATE DRIFT ERRORS

DYNAMIC WRITE SELECTION FOR SHELF-LIFE RETENTION IN NON-VOLATILE ME...

VELOCITY BASED WRITE DISTURB REFRESH

ADAPTIVE WRITE CURRENT ADJUSTMENT FOR PERSISTENT MEMORIES

NEAR MISS-BASED REFRESH FOR READ DISTURB MITIGATION

WRITE DISTURB REFRESH RATE REDUCTION USING WRITE HISTORY BUFFER

TECHNIQUES TO ACCESS NON-VOLATILE MEMORY USING DECK OFFSET

REDUCED UNCORRECTABLE MEMORY ERRORS

METHOD AND APPARATUS FOR REDUCING SILENT DATA ERRORS IN NON-VOLATIL...

METHOD AND APPARATUS FOR ADJUSTING DEMARCATION VOLTAGES BASED ON CY...

TIME TRACKING WITH PATROL SCRUB

MEMORY PRESET ADJUSTMENT BASED ON ADAPTIVE CALIBRATION

REDUCED UNCORRECTABLE MEMORY ERRORS

MANAGING DISTURBANCE INDUCED ERRORS

MANAGING THRESHOLD VOLTAGE SHIFT IN NONVOLATILE MEMORY

APPARATUS AND METHOD FOR DRIFT CANCELLATION IN A MEMORY

SET AND RESET OPERATION IN PHASE CHANGE MEMORY AND ASSOCIATED TECHN...

MANAGING DISTURBANCE INDUCED ERRORS

REDUCED UNCORRECTABLE MEMORY ERRORS

THRESHOLD VOLTAGE EXPANSION

FLEXIBLE WEAR MANAGEMENT FOR NON-VOLATILE MEMORY

MITIGATING READ DISTURB IN A CROSS-POINT MEMORY

ERROR CORRECTION IN NON_VOLATILE MEMORY

SET AND RESET OPERATION IN PHASE CHANGE MEMORY AND ASSOCIATED TECHN...

MANAGING DISTURBANCE INDUCED ERRORS

REDUCED UNCORRECTABLE MEMORY ERRORS

FLEXIBLE WEAR MANAGEMENT FOR NON-VOLATILE MEMORY

Techniques Associated with a Read and Write Window Budget for a Two...

Techniques Associated with Protecting System Critical Data Written...

ISOLATING, AT LEAST IN PART, LOCAL ROW OR COLUMN CIRCUITRY OF MEMOR...