Pratyush Kamal

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Three-dimensional (3D) integrated circuit device having a backside...
- Patent number 11,444,068
- Issue date Sep 13, 2022
- QUALCOMM Incorporated
- Stanley Seungchul Song
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power distribution networks for a three-dimensional (3D) integrated...
- Patent number 10,121,743
- Issue date Nov 6, 2018
- QUALCOMM Incorporated
- Pratyush Kamal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon-on-insulator (SOI) complementary metal oxide semiconductor...
- Patent number 10,062,680
- Issue date Aug 28, 2018
- QUALCOMM Incorporated
- Pratyush Kamal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Connection propagation for inter-logical block connections in integ...
- Patent number 9,929,733
- Issue date Mar 27, 2018
- QUALCOMM Incorporated
- Pratyush Kamal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power gate placement techniques in three-dimensional (3D) integrate...
- Patent number 9,754,923
- Issue date Sep 5, 2017
- QUALCOMM Incorporated
- Jing Xie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three dimensional logic circuit
- Patent number 9,537,471
- Issue date Jan 3, 2017
- QUALCOMM Incorporated
- Pratyush Kamal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock tree synthesis for low cost pre-bond testing of 3D integrated...
- Patent number 9,508,615
- Issue date Nov 29, 2016
- QUALCOMM Incorporated
- Sung Kyu Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Monolithic three dimensional (3D) integrated circuit (IC) (3DIC) cr...
- Patent number 9,213,358
- Issue date Dec 15, 2015
- QUALCOMM Incorporated
- Pratyush Kamal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Monolithic three dimensional (3D) integrated circuits (ICs) (3DICs)...
- Patent number 9,147,438
- Issue date Sep 29, 2015
- QUALCOMM Incorporated
- Pratyush Kamal
- G11 - INFORMATION STORAGE
Information Patent Grant
Placement of monolithic inter-tier vias (MIVs) within monolithic th...
- Patent number 9,123,721
- Issue date Sep 1, 2015
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Length-of-diffusion protected circuit and method of design
- Patent number 9,093,995
- Issue date Jul 28, 2015
- QUALCOMM Incorporated
- Kashyap Ramachandra Bellur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Decoupling capacitor for integrated circuit
- Patent number 9,053,960
- Issue date Jun 9, 2015
- QUALCOMM Incorporated
- Pratyush Kamal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Monolithic three dimensional (3D) flip-flops with minimal clock ske...
- Patent number 9,013,235
- Issue date Apr 21, 2015
- QUALCOMM Incorporated
- Pratyush Kamal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Shared-diffusion standard cell architecture
- Patent number 8,836,040
- Issue date Sep 16, 2014
- QUALCOMM Incorporated
- Pratyush Kamal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Standard cell architecture using double poly patterning for multi V...
- Patent number 8,610,176
- Issue date Dec 17, 2013
- QUALCOMM Incorporated
- Prayag B. Patel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for characterizing and reducing proximity effe...
- Patent number 8,584,075
- Issue date Nov 12, 2013
- QUALCOMM Incorporated
- Animesh Datta
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT DEVICE HAVING A BACKSIDE...
- Publication number 20220020735
- Publication date Jan 20, 2022
- QUALCOMM Incorporated
- Stanley Seungchul SONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER DISTRIBUTION NETWORKS FOR A THREE-DIMENSIONAL (3D) INTEGRATED...
- Publication number 20190027435
- Publication date Jan 24, 2019
- QUALCOMM Incorporated
- Pratyush Kamal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER DISTRIBUTION NETWORKS FOR A THREE-DIMENSIONAL (3D) INTEGRATED...
- Publication number 20180286800
- Publication date Oct 4, 2018
- QUALCOMM Incorporated
- Pratyush Kamal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CLOCK TREE SYNTHESIS FOR LOW COST PRE-BOND TESTING OF 3D INTEGRATED...
- Publication number 20160233134
- Publication date Aug 11, 2016
- QUALCOMM Incorporated
- Sung Kyu LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE DIMENSIONAL LOGIC CIRCUIT
- Publication number 20160233853
- Publication date Aug 11, 2016
- QUALCOMM Incorporated
- Pratyush KAMAL
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH QUALITY PHYSICAL DESIGN FOR MONOLITHIC THREE-DIMENSIONAL INTEG...
- Publication number 20160042110
- Publication date Feb 11, 2016
- QUALCOMM Incorporated
- Sung Kyu LIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLACEMENT OF MONOLITHIC INTER-TIER VIAS (MIVs) WITHIN MONOLITHIC TH...
- Publication number 20150333005
- Publication date Nov 19, 2015
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SILICON-ON-INSULATOR (SOI) COMPLEMENTARY METAL OXIDE SEMICONDUCTOR...
- Publication number 20150325563
- Publication date Nov 12, 2015
- QUALCOMM Incorporated
- Pratyush Kamal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLACEMENT OF MONOLITHIC INTER-TIER VIAS (MIVs) WITHIN MONOLITHIC TH...
- Publication number 20150145143
- Publication date May 28, 2015
- QUALCOMM Incorporated
- Kambiz Samadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MONOLITHIC THREE DIMENSIONAL (3D) INTEGRATED CIRCUIT (IC) (3DIC) CR...
- Publication number 20150121327
- Publication date Apr 30, 2015
- QUALCOMM Incorporated
- Pratyush Kamal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MONOLITHIC THREE DIMENSIONAL (3D) INTEGRATED CIRCUITS (ICs) (3DICs)...
- Publication number 20150109843
- Publication date Apr 23, 2015
- QUALCOMM Incorporated
- Pratyush Kamal
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS OF DESIGNING THREE DIMENSIONAL (3D) INTEGRATED CIRCUITS (IC...
- Publication number 20150112646
- Publication date Apr 23, 2015
- QUALCOMM Incorporated
- Pratyush Kamal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MONOLITHIC THREE DIMENSIONAL (3D) FLIP-FLOPS WITH MINIMAL CLOCK SKE...
- Publication number 20150022250
- Publication date Jan 22, 2015
- QUALCOMM Incorporated
- Pratyush Kamal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MONOLITHIC THREE DIMENSIONAL (3D) RANDOM ACCESS MEMORY (RAM) ARRAY...
- Publication number 20150019802
- Publication date Jan 15, 2015
- QUALCOMM Incorporated
- Pratyush Kamal
- G11 - INFORMATION STORAGE
Information Patent Application
LENGTH-OF-DIFFUSION PROTECTED CIRCUIT AND METHOD OF DESIGN
- Publication number 20140354338
- Publication date Dec 4, 2014
- Kashyap Ramachandra Bellur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DECOUPLING CAPACITOR FOR INTEGRATED CIRCUIT
- Publication number 20140246715
- Publication date Sep 4, 2014
- QUALCOMM Incorporated
- Pratyush Kamal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHARED-DIFFUSION STANDARD CELL ARCHITECTURE
- Publication number 20140124868
- Publication date May 8, 2014
- QUALCOMM Incorporated
- Pratyush Kamal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AREA EFFICIENT GRIDDED POLYSILICON LAYOUTS
- Publication number 20130032885
- Publication date Feb 7, 2013
- QUALCOMM Incorporated
- Chethan Swamynathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and Apparatus for Characterizing and Reducing Proximity Effe...
- Publication number 20120210284
- Publication date Aug 16, 2012
- QUALCOMM Incorporated
- Animesh Datta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Standard Cell Architecture Using Double Poly Patterning for Multi V...
- Publication number 20120180016
- Publication date Jul 12, 2012
- QUALCOMM Incorporated
- PR Chidambaram
- H01 - BASIC ELECTRIC ELEMENTS

Pratyush Kamal

Person

Patents Grantslast 30 patents

Three-dimensional (3D) integrated circuit device having a backside...

Power distribution networks for a three-dimensional (3D) integrated...

Silicon-on-insulator (SOI) complementary metal oxide semiconductor...

Connection propagation for inter-logical block connections in integ...

Power gate placement techniques in three-dimensional (3D) integrate...

Three dimensional logic circuit

Clock tree synthesis for low cost pre-bond testing of 3D integrated...

Monolithic three dimensional (3D) integrated circuit (IC) (3DIC) cr...

Monolithic three dimensional (3D) integrated circuits (ICs) (3DICs)...

Placement of monolithic inter-tier vias (MIVs) within monolithic th...

Length-of-diffusion protected circuit and method of design

Decoupling capacitor for integrated circuit

Monolithic three dimensional (3D) flip-flops with minimal clock ske...

Shared-diffusion standard cell architecture

Standard cell architecture using double poly patterning for multi V...

Method and apparatus for characterizing and reducing proximity effe...

Patents Applicationslast 30 patents

THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT DEVICE HAVING A BACKSIDE...

POWER DISTRIBUTION NETWORKS FOR A THREE-DIMENSIONAL (3D) INTEGRATED...

POWER DISTRIBUTION NETWORKS FOR A THREE-DIMENSIONAL (3D) INTEGRATED...

CLOCK TREE SYNTHESIS FOR LOW COST PRE-BOND TESTING OF 3D INTEGRATED...

THREE DIMENSIONAL LOGIC CIRCUIT

HIGH QUALITY PHYSICAL DESIGN FOR MONOLITHIC THREE-DIMENSIONAL INTEG...

PLACEMENT OF MONOLITHIC INTER-TIER VIAS (MIVs) WITHIN MONOLITHIC TH...

SILICON-ON-INSULATOR (SOI) COMPLEMENTARY METAL OXIDE SEMICONDUCTOR...

PLACEMENT OF MONOLITHIC INTER-TIER VIAS (MIVs) WITHIN MONOLITHIC TH...

MONOLITHIC THREE DIMENSIONAL (3D) INTEGRATED CIRCUIT (IC) (3DIC) CR...

MONOLITHIC THREE DIMENSIONAL (3D) INTEGRATED CIRCUITS (ICs) (3DICs)...

METHODS OF DESIGNING THREE DIMENSIONAL (3D) INTEGRATED CIRCUITS (IC...

MONOLITHIC THREE DIMENSIONAL (3D) FLIP-FLOPS WITH MINIMAL CLOCK SKE...

MONOLITHIC THREE DIMENSIONAL (3D) RANDOM ACCESS MEMORY (RAM) ARRAY...

LENGTH-OF-DIFFUSION PROTECTED CIRCUIT AND METHOD OF DESIGN

DECOUPLING CAPACITOR FOR INTEGRATED CIRCUIT

SHARED-DIFFUSION STANDARD CELL ARCHITECTURE

AREA EFFICIENT GRIDDED POLYSILICON LAYOUTS

Method and Apparatus for Characterizing and Reducing Proximity Effe...

Standard Cell Architecture Using Double Poly Patterning for Multi V...