Premkumar Seetharaman

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Bangalore, IN

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Patents Grantslast 30 patents

Information Patent Grant
Circuits and methods for performance optimization of SRAM memory
- Patent number 9,734,896
- Issue date Aug 15, 2017
- Texas Instruments Incorporated
- Per Torstein Roine
- G11 - INFORMATION STORAGE
Information Patent Grant
Burst mode read controllable SRAM
- Patent number 9,613,685
- Issue date Apr 4, 2017
- Texas Instruments Incorporated
- Premkumar Seetharaman
- G11 - INFORMATION STORAGE
Information Patent Grant
Automatic latch-up prevention in SRAM
- Patent number 9,496,024
- Issue date Nov 15, 2016
- Texas Instruments Incorporated
- Srinivasa Raghavan Sridhara
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuits and methods for performance optimization of SRAM memory
- Patent number 9,384,826
- Issue date Jul 5, 2016
- Texas Instruments Incorporated
- Per Torstein Roine
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Circuits and Methods for Performance Optimization of SRAM Memory
- Publication number 20160314832
- Publication date Oct 27, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Per Torstein Roine
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUITS AND METHODS FOR PERFORMANCE OPTIMIZATION OF SRAM MEMORY
- Publication number 20160163379
- Publication date Jun 9, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Per Torstein Roine
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER SRAM
- Publication number 20160064070
- Publication date Mar 3, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Vinod MENEZES
- G11 - INFORMATION STORAGE
Information Patent Application
LOW VOLTAGE SRAM
- Publication number 20160064069
- Publication date Mar 3, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Vinod MENEZES
- G11 - INFORMATION STORAGE