Primit Modi

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Bias control circuit with distributed architecture for memory cells
- Patent number 10,424,358
- Issue date Sep 24, 2019
- SanDisk Technologies LLC
- Supraja Sundaresan
- G11 - INFORMATION STORAGE
Information Patent Grant
Duty cycle correction scheme for complementary signals
- Patent number 10,284,182
- Issue date May 7, 2019
- SanDisk Technologies LLC
- Primit Modi
- G11 - INFORMATION STORAGE
Information Patent Grant
Bulk modulation scheme to reduce I/O pin capacitance
- Patent number 9,792,994
- Issue date Oct 17, 2017
- SanDisk Technologies LLC
- Primit Modi
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ESTIMATING PEAK SOURCE CURRENT USING MEMORY DIE SUBSTRATE TEMPERATU...
- Publication number 20240404605
- Publication date Dec 5, 2024
- Western Digital Technologies, Inc.
- KEYUR PAYAK
- G11 - INFORMATION STORAGE
Information Patent Application
BIAS CONTROL CIRCUIT WITH DISTRIBUTED ARCHITECTURE FOR MEMORY CELLS
- Publication number 20180358069
- Publication date Dec 13, 2018
- SanDisk Technologies LLC
- Supraja SUNDARESAN
- G11 - INFORMATION STORAGE
Information Patent Application
DUTY CYCLE CORRECTION SCHEME FOR COMPLEMENTARY SIGNALS
- Publication number 20180175834
- Publication date Jun 21, 2018
- SanDisk Technologies LLC
- Primit Modi
- H03 - BASIC ELECTRONIC CIRCUITRY