Purval S. Sule

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Configuration of a memory device for programming memory cells
- Patent number 11,721,396
- Issue date Aug 8, 2023
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including concurrent suspend states for different ope...
- Patent number 11,210,025
- Issue date Dec 28, 2021
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configuration of a memory device for programming memory cells
- Patent number 10,777,277
- Issue date Sep 15, 2020
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
One check fail byte (CFBYTE) scheme
- Patent number 10,762,974
- Issue date Sep 1, 2020
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for dynamically determining start program volt...
- Patent number 10,714,186
- Issue date Jul 14, 2020
- Intel Corporation
- Purval Shyam Sule
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for providing signal calibration data
- Patent number 10,622,083
- Issue date Apr 14, 2020
- Intel Corporation
- Varsha Regulapati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device including concurrent suspend states for different ope...
- Patent number 10,514,862
- Issue date Dec 24, 2019
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a memory device during programming
- Patent number 10,482,974
- Issue date Nov 19, 2019
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
Pseudo single pass NAND memory programming
- Patent number 10,446,238
- Issue date Oct 15, 2019
- Intel Corporation
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE
Information Patent Grant
One check fail byte (CFBYTE) scheme
- Patent number 10,354,738
- Issue date Jul 16, 2019
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE
Information Patent Grant
Block by deck operations for NAND memory
- Patent number 10,325,665
- Issue date Jun 18, 2019
- Intel Corporation
- Richard Fastow
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for specifying read voltage offsets for a read...
- Patent number 10,268,407
- Issue date Apr 23, 2019
- Intel Corporation
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamically determining start program volt...
- Patent number 10,224,107
- Issue date Mar 5, 2019
- Intel Corporation
- Purval Shyam Sule
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CONFIGURATION OF A MEMORY DEVICE FOR PROGRAMMING MEMORY CELLS
- Publication number 20200402586
- Publication date Dec 24, 2020
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING CONCURRENT SUSPEND STATES FOR DIFFERENT OPE...
- Publication number 20200133579
- Publication date Apr 30, 2020
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURATION OF A MEMORY DEVICE FOR PROGRAMMING MEMORY CELLS
- Publication number 20200066350
- Publication date Feb 27, 2020
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR DYNAMICALLY DETERMINING START PROGRAM VOLT...
- Publication number 20190304543
- Publication date Oct 3, 2019
- Intel Corporation
- Purval Shyam Sule
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR PROVIDING SIGNAL CALIBRATION DATA
- Publication number 20190252033
- Publication date Aug 15, 2019
- Intel Corporation
- Varsha REGULAPATI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SPECIFYING READ VOLTAGE OFFSETS FOR A READ...
- Publication number 20190102097
- Publication date Apr 4, 2019
- Intel Corporation
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ONE CHECK FAIL BYTE (CFBYTE) SCHEME
- Publication number 20190096494
- Publication date Mar 28, 2019
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE
Information Patent Application
PSEUDO SINGLE PASS NAND MEMORY PROGRAMMING
- Publication number 20190096490
- Publication date Mar 28, 2019
- Intel Corporation
- ALIASGAR S. MADRASWALA
- G11 - INFORMATION STORAGE
Information Patent Application
BLOCK BY DECK OPERATIONS FOR NAND MEMORY
- Publication number 20190043591
- Publication date Feb 7, 2019
- RICHARD FASTOW
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, SYSTEM, AND APPARATUS FOR DETECTING FAILURE OF PROGRAMMING...
- Publication number 20190006016
- Publication date Jan 3, 2019
- Intel Corporation
- Ali KHAKIFIROOZ
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING CONCURRENT SUSPEND STATES FOR DIFFERENT OPE...
- Publication number 20180024772
- Publication date Jan 25, 2018
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING

Purval S. Sule

Person

Patents Grantslast 30 patents

Configuration of a memory device for programming memory cells

Memory device including concurrent suspend states for different ope...

Configuration of a memory device for programming memory cells

One check fail byte (CFBYTE) scheme

Method and apparatus for dynamically determining start program volt...

Techniques for providing signal calibration data

Memory device including concurrent suspend states for different ope...

Operation of a memory device during programming

Pseudo single pass NAND memory programming

One check fail byte (CFBYTE) scheme

Block by deck operations for NAND memory

Method and apparatus for specifying read voltage offsets for a read...

Method and apparatus for dynamically determining start program volt...

Patents Applicationslast 30 patents

CONFIGURATION OF A MEMORY DEVICE FOR PROGRAMMING MEMORY CELLS

MEMORY DEVICE INCLUDING CONCURRENT SUSPEND STATES FOR DIFFERENT OPE...

CONFIGURATION OF A MEMORY DEVICE FOR PROGRAMMING MEMORY CELLS

METHOD AND APPARATUS FOR DYNAMICALLY DETERMINING START PROGRAM VOLT...

TECHNIQUES FOR PROVIDING SIGNAL CALIBRATION DATA

METHOD AND APPARATUS FOR SPECIFYING READ VOLTAGE OFFSETS FOR A READ...

ONE CHECK FAIL BYTE (CFBYTE) SCHEME

PSEUDO SINGLE PASS NAND MEMORY PROGRAMMING

BLOCK BY DECK OPERATIONS FOR NAND MEMORY

METHOD, SYSTEM, AND APPARATUS FOR DETECTING FAILURE OF PROGRAMMING...

MEMORY DEVICE INCLUDING CONCURRENT SUSPEND STATES FOR DIFFERENT OPE...