R. Dean Adams

Person

St. George, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Testing of ECC memories
- Patent number 7,308,621
- Issue date Dec 11, 2007
- International Business Machines Corporation
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Asynchronous control of memory self test
- Patent number 7,203,873
- Issue date Apr 10, 2007
- Magma Design Automation, Inc.
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Programable multi-port memory BIST with compact microcode
- Patent number 7,168,005
- Issue date Jan 23, 2007
- Cadence Design Systems, Inc.
- R. Dean Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized ECC/redundancy fault recovery
- Patent number 7,149,941
- Issue date Dec 12, 2006
- International Business Machines Corporation
- R. Dean Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for testing multi-port memories
- Patent number 7,032,144
- Issue date Apr 18, 2006
- Cadence Design Systems Inc.
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Two-dimensional redundancy calculation
- Patent number 7,003,704
- Issue date Feb 21, 2006
- International Business Machines Corporation
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self test system and method for two-dimensional memory red...
- Patent number 6,907,554
- Issue date Jun 14, 2005
- International Business Machines Corporation
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
System initialization of microcode-based memory built-in self-test
- Patent number 6,874,111
- Issue date Mar 29, 2005
- International Business Machines Corporation
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for testing memory cells for data retention fa...
- Patent number 6,681,350
- Issue date Jan 20, 2004
- Cadence Design Systems, Inc.
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable memory built-in self-test combining microcode and fini...
- Patent number 6,651,201
- Issue date Nov 18, 2003
- International Business Machines Corporation
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for testing multi-port memories
- Patent number 6,557,127
- Issue date Apr 29, 2003
- Cadence Design Systems, Inc.
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having resistive bitline contact testing
- Patent number 6,208,572
- Issue date Mar 27, 2001
- International Business Machines Corporation
- R. Dean Adams
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Redundant memory self-test
- Publication number 20050066226
- Publication date Mar 24, 2005
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF TEST SYSTEM AND METHOD FOR TWO-DIMENSIONAL MEMORY RED...
- Publication number 20040225939
- Publication date Nov 11, 2004
- International Business Machines Corporation
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Application
Two-dimensional redundancy calculation
- Publication number 20040093540
- Publication date May 13, 2004
- International Business Machines Corporation
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for testing multi-port memories
- Publication number 20040006727
- Publication date Jan 8, 2004
- Cadence Design Systems, Inc.
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Application
Optimized ECC/redundancy fault recovery
- Publication number 20030204798
- Publication date Oct 30, 2003
- International Business Machines Corporation
- R. Dean Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Testing of ECC memories
- Publication number 20030204795
- Publication date Oct 30, 2003
- International Business Machines Corporation
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Application
Programable multi-port memory bist with compact microcode
- Publication number 20030120974
- Publication date Jun 26, 2003
- Cadence Design Systems, Inc.
- R. Dean Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for testing memory cells for data retention fa...
- Publication number 20020166086
- Publication date Nov 7, 2002
- International Business Machines Corporation
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for testing memory
- Publication number 20020114202
- Publication date Aug 22, 2002
- International Business Machines Corporation
- R. Dean Adams
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for testing memory
- Publication number 20020116673
- Publication date Aug 22, 2002
- International Business Machines Corporation
- R. Dean Adams
- G11 - INFORMATION STORAGE

R. Dean Adams

Person

Patents Grantslast 30 patents

Testing of ECC memories

Asynchronous control of memory self test

Programable multi-port memory BIST with compact microcode

Optimized ECC/redundancy fault recovery

Method and apparatus for testing multi-port memories

Two-dimensional redundancy calculation

Built-in self test system and method for two-dimensional memory red...

System initialization of microcode-based memory built-in self-test

Method and apparatus for testing memory cells for data retention fa...

Programmable memory built-in self-test combining microcode and fini...

Method and apparatus for testing multi-port memories

Semiconductor memory device having resistive bitline contact testing

Patents Applicationslast 30 patents

Redundant memory self-test

BUILT-IN SELF TEST SYSTEM AND METHOD FOR TWO-DIMENSIONAL MEMORY RED...

Two-dimensional redundancy calculation

Method and apparatus for testing multi-port memories

Optimized ECC/redundancy fault recovery

Testing of ECC memories

Programable multi-port memory bist with compact microcode

Method and apparatus for testing memory cells for data retention fa...

Method and apparatus for testing memory

Method and apparatus for testing memory