RAGHAVAN KUMAR

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Technologies for memory and I/O efficient operations on homomorphic...
- Patent number 12,316,735
- Issue date May 27, 2025
- Intel Corporation
- Vikram B. Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency post-quantum signature verification for fast secure-boot
- Patent number 12,137,169
- Issue date Nov 5, 2024
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Time and frequency domain side-channel leakage suppression using in...
- Patent number 12,047,485
- Issue date Jul 23, 2024
- Intel Corporation
- Raghavan Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined SHA2 and SHA3 based XMSS hardware accelerator
- Patent number 11,917,053
- Issue date Feb 27, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
LSTM circuit with selective input computation
- Patent number 11,790,217
- Issue date Oct 17, 2023
- Intel Corporation
- Ram Krishnamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memoryless weight storage hardware for neural networks
- Patent number 11,783,160
- Issue date Oct 10, 2023
- Intel Corporation
- Phil Knag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Odd index precomputation for authentication path computation
- Patent number 11,770,262
- Issue date Sep 26, 2023
- Intel Corporation
- Rafael Misoczki
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Secure PUF-based device authentication using adversarial challenge...
- Patent number 11,768,966
- Issue date Sep 26, 2023
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accelerators for post-quantum cryptography secure hash-based signin...
- Patent number 11,770,258
- Issue date Sep 26, 2023
- Intel Corporation
- Vikram Suresh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Message index aware multi-hash accelerator for post quantum cryptog...
- Patent number 11,750,402
- Issue date Sep 5, 2023
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
FinFET transistor based resistive random access memory
- Patent number 11,751,404
- Issue date Sep 5, 2023
- Intel Corporation
- Abhishek Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Compute near memory convolution accelerator
- Patent number 11,726,950
- Issue date Aug 15, 2023
- Intel Corporation
- Huseyin Ekin Sumbul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Applications of back-end-of-line (BEOL) capacitors in compute-in-me...
- Patent number 11,727,260
- Issue date Aug 15, 2023
- Intel Corporation
- Abhishek Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor array for processing sparse binary neural networks
- Patent number 11,663,452
- Issue date May 30, 2023
- Intel Corporation
- Ram Krishnamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable memory compression techniques for deep neural networks
- Patent number 11,625,584
- Issue date Apr 11, 2023
- Intel Corporation
- Raghavan Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deep in memory architecture using resistive switches
- Patent number 11,522,012
- Issue date Dec 6, 2022
- Intel Corporation
- Jack T. Kavalieros
- G11 - INFORMATION STORAGE
Information Patent Grant
In-memory analog neural cache
- Patent number 11,502,696
- Issue date Nov 15, 2022
- Intel Corporation
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified accelerator for classical and post-quantum digital signatur...
- Patent number 11,456,877
- Issue date Sep 27, 2022
- Intel Corporation
- Sanu Mathew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure PUF-based device authentication using adversarial challenge...
- Patent number 11,455,431
- Issue date Sep 27, 2022
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low synch dedicated accelerator with in-memory computation capability
- Patent number 11,416,165
- Issue date Aug 16, 2022
- Intel Corporation
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency post-quantum signature verification for fast secure-boot
- Patent number 11,405,213
- Issue date Aug 2, 2022
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Compute in/near memory (CIM) circuit architecture for unified matri...
- Patent number 11,347,477
- Issue date May 31, 2022
- Intel Corporation
- Huseyin Ekin Sumbul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Weight prefetch for in-memory neural network execution
- Patent number 11,347,994
- Issue date May 31, 2022
- Intel Corporation
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined SHA2 and SHA3 based XMSS hardware accelerator
- Patent number 11,303,429
- Issue date Apr 12, 2022
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable neuron core with on-chip learning and stochastic time...
- Patent number 11,281,963
- Issue date Mar 22, 2022
- Intel Corporation
- Raghavan Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Message index aware multi-hash accelerator for post quantum cryptog...
- Patent number 11,240,039
- Issue date Feb 1, 2022
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Odd index precomputation for authentication path computation
- Patent number 11,223,483
- Issue date Jan 11, 2022
- Intel Corporation
- Rafael Misoczki
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Accelerators for post-quantum cryptography secure hash-based signin...
- Patent number 11,218,320
- Issue date Jan 4, 2022
- Intel Corporation
- Vikram Suresh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Post quantum public key signature operation for reconfigurable circ...
- Patent number 11,205,017
- Issue date Dec 21, 2021
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable neuro-synaptic cores for spiking neural network
- Patent number 11,195,079
- Issue date Dec 7, 2021
- Intel Corporation
- Huseyin E. Sumbul
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
COMPUTE ENGINE CONTROL BLOCK (CCB) DISTRIBUTED DATA WORD ARCHITECTURE
- Publication number 20250211416
- Publication date Jun 26, 2025
- Intel Corporation
- Christopher B. WILKERSON
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNIQUES FOR COMPRESSED ROUTE TABLES FOR CONTENTION-FREE ROUTING...
- Publication number 20250211420
- Publication date Jun 26, 2025
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CONFIGURABLE VARIABLE-WORD SIZE XORSHIFT RANDOM NUMBER GENERATOR
- Publication number 20250211435
- Publication date Jun 26, 2025
- Intel Corporation
- Saurav MAJI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNIQUES FOR STALLED ROUTING ASSOCIATED WITH NUMBER-THEORETIC- TR...
- Publication number 20250208879
- Publication date Jun 26, 2025
- Intel Corporation
- Raghavan KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Method for Attack-Resistant Encryption and Decryption
- Publication number 20250211421
- Publication date Jun 26, 2025
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Modular Exponentiation Hardware Accelerator with Unconstrained Oper...
- Publication number 20250202699
- Publication date Jun 19, 2025
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNIQUES FOR USE OF MIXED WORD SIZE MULTIPLICATION FOR FULLY HOMO...
- Publication number 20250112757
- Publication date Apr 3, 2025
- Intel Corporation
- Raghavan KUMAR
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ON-DIE KEY GENERATOR FOR FULLY-HOMOMORPHIC ENCRYPTION RELINEARIZATI...
- Publication number 20250112772
- Publication date Apr 3, 2025
- Intel Corporation
- Sachin TANEJA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
STATIC INSTRUCTION DECOUPLING (SID) FOR DATA MOVEMENT AND COMPUTE
- Publication number 20250110735
- Publication date Apr 3, 2025
- AppaRao CHALLAGUNDLA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFIED SIDE-CHANNEL AND FAULT-INJECTION RESISTANT AES ENGINE
- Publication number 20250112759
- Publication date Apr 3, 2025
- Raghavan KUMAR
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FULLY HOMOMORPHIC ENCRYPTION
- Publication number 20250007687
- Publication date Jan 2, 2025
- Intel Corporation
- Sanu MATHEW
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECONFIGURABLE COMPUTE CIRCUITRY TO PERFORM FULLY HOMOMORPHIC ENCRY...
- Publication number 20250007688
- Publication date Jan 2, 2025
- Intel Corporation
- Raghavan KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR TWIDDLE FACTOR GENERATION FOR NUMBER-THEORETIC- TRAN...
- Publication number 20250005101
- Publication date Jan 2, 2025
- Intel Corporation
- Sachin TANEJA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR CONTENTION-FREE ROUTING FOR NUMBER-THEORETIC- TRANSF...
- Publication number 20250005100
- Publication date Jan 2, 2025
- Intel Corporation
- Raghavan KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR TWIDDLE FACTOR GENERATION FOR NUMBER-THEORETIC-TRANS...
- Publication number 20250005102
- Publication date Jan 2, 2025
- Intel Corporation
- Sachin TANEJA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIDE-CHANNEL RESISTANT MULTIPLICATIVELY MASKED AES ENGINE WITH ZERO...
- Publication number 20240333471
- Publication date Oct 3, 2024
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ERROR DETECTION IN CRYPTOGRAPHIC SUBSTITUTION BOX OPERATIONS
- Publication number 20240333472
- Publication date Oct 3, 2024
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECONFIGURABLE SIDE-CHANNEL RESISTANT DOUBLE-THROUGHPUT AES ACCELER...
- Publication number 20240007266
- Publication date Jan 4, 2024
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SIDE-CHANNEL RESISTANT BULK AES ENCRYPTION
- Publication number 20240007267
- Publication date Jan 4, 2024
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LSTM CIRCUIT WITH SELECTIVE INPUT COMPUTATION
- Publication number 20230401434
- Publication date Dec 14, 2023
- Intel Corporation
- Ram KRISHNAMURTHY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE NEAR MEMORY CONVOLUTION ACCELERATOR
- Publication number 20230334006
- Publication date Oct 19, 2023
- Intel Corporation
- Huseyin Ekin SUMBUL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR ARRAY FOR PROCESSING SPARSE BINARY NEURAL NETWORKS
- Publication number 20230297819
- Publication date Sep 21, 2023
- Intel Corporation
- Ram KRISHNAMURTHY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFIED ACCELERATOR FOR CLASSICAL AND POST-QUANTUM DIGITAL SIGNATUR...
- Publication number 20230017447
- Publication date Jan 19, 2023
- Intel Corporation
- Sanu Mathew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE PUF-BASED DEVICE AUTHENTICATION USING ADVERSARIAL CHALLENGE...
- Publication number 20230004681
- Publication date Jan 5, 2023
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY POST-QUANTUM SIGNATURE VERIFICATION FOR FAST SECURE-BOOT
- Publication number 20220337421
- Publication date Oct 20, 2022
- Intel Corporation
- SANTOSH GHOSH
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COMBINED SHA2 AND SHA3 BASED XMSS HARDWARE ACCELERATOR
- Publication number 20220224514
- Publication date Jul 14, 2022
- Intel Corporation
- SANTOSH GHOSH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIME AND FREQUENCY DOMAIN SIDE-CHANNEL LEAKAGE SUPPRESSION USING IN...
- Publication number 20220200784
- Publication date Jun 23, 2022
- Intel Corporation
- Raghavan Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ODD INDEX PRECOMPUTATION FOR AUTHENTICATION PATH COMPUTATION
- Publication number 20220131706
- Publication date Apr 28, 2022
- Intel Corporation
- RAFAEL MISOCZKI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ACCELERATORS FOR POST-QUANTUM CRYPTOGRAPHY SECURE HASH-BASED SIGNIN...
- Publication number 20220123943
- Publication date Apr 21, 2022
- Intel Corporation
- VIKRAM SURESH
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
POST QUANTUM PUBLIC KEY SIGNATURE OPERATION FOR RECONFIGURABLE CIRC...
- Publication number 20220108039
- Publication date Apr 7, 2022
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING

RAGHAVAN KUMAR

Person

Patents Grantslast 30 patents

Technologies for memory and I/O efficient operations on homomorphic...

Low latency post-quantum signature verification for fast secure-boot

Time and frequency domain side-channel leakage suppression using in...

Combined SHA2 and SHA3 based XMSS hardware accelerator

LSTM circuit with selective input computation

Memoryless weight storage hardware for neural networks

Odd index precomputation for authentication path computation

Secure PUF-based device authentication using adversarial challenge...

Accelerators for post-quantum cryptography secure hash-based signin...

Message index aware multi-hash accelerator for post quantum cryptog...

FinFET transistor based resistive random access memory

Compute near memory convolution accelerator

Applications of back-end-of-line (BEOL) capacitors in compute-in-me...

Processor array for processing sparse binary neural networks

Reconfigurable memory compression techniques for deep neural networks

Deep in memory architecture using resistive switches

In-memory analog neural cache

Unified accelerator for classical and post-quantum digital signatur...

Secure PUF-based device authentication using adversarial challenge...

Low synch dedicated accelerator with in-memory computation capability

Low latency post-quantum signature verification for fast secure-boot

Compute in/near memory (CIM) circuit architecture for unified matri...

Weight prefetch for in-memory neural network execution

Combined SHA2 and SHA3 based XMSS hardware accelerator

Programmable neuron core with on-chip learning and stochastic time...

Message index aware multi-hash accelerator for post quantum cryptog...

Odd index precomputation for authentication path computation

Accelerators for post-quantum cryptography secure hash-based signin...

Post quantum public key signature operation for reconfigurable circ...

Reconfigurable neuro-synaptic cores for spiking neural network

Patents Applicationslast 30 patents

COMPUTE ENGINE CONTROL BLOCK (CCB) DISTRIBUTED DATA WORD ARCHITECTURE

TECHNIQUES FOR COMPRESSED ROUTE TABLES FOR CONTENTION-FREE ROUTING...

CONFIGURABLE VARIABLE-WORD SIZE XORSHIFT RANDOM NUMBER GENERATOR

TECHNIQUES FOR STALLED ROUTING ASSOCIATED WITH NUMBER-THEORETIC- TR...

Apparatus and Method for Attack-Resistant Encryption and Decryption

Modular Exponentiation Hardware Accelerator with Unconstrained Oper...

TECHNIQUES FOR USE OF MIXED WORD SIZE MULTIPLICATION FOR FULLY HOMO...

ON-DIE KEY GENERATOR FOR FULLY-HOMOMORPHIC ENCRYPTION RELINEARIZATI...

STATIC INSTRUCTION DECOUPLING (SID) FOR DATA MOVEMENT AND COMPUTE

UNIFIED SIDE-CHANNEL AND FAULT-INJECTION RESISTANT AES ENGINE

FULLY HOMOMORPHIC ENCRYPTION

RECONFIGURABLE COMPUTE CIRCUITRY TO PERFORM FULLY HOMOMORPHIC ENCRY...

TECHNIQUES FOR TWIDDLE FACTOR GENERATION FOR NUMBER-THEORETIC- TRAN...

TECHNIQUES FOR CONTENTION-FREE ROUTING FOR NUMBER-THEORETIC- TRANSF...

TECHNIQUES FOR TWIDDLE FACTOR GENERATION FOR NUMBER-THEORETIC-TRANS...

SIDE-CHANNEL RESISTANT MULTIPLICATIVELY MASKED AES ENGINE WITH ZERO...

ERROR DETECTION IN CRYPTOGRAPHIC SUBSTITUTION BOX OPERATIONS

RECONFIGURABLE SIDE-CHANNEL RESISTANT DOUBLE-THROUGHPUT AES ACCELER...

SIDE-CHANNEL RESISTANT BULK AES ENCRYPTION

LSTM CIRCUIT WITH SELECTIVE INPUT COMPUTATION

COMPUTE NEAR MEMORY CONVOLUTION ACCELERATOR

PROCESSOR ARRAY FOR PROCESSING SPARSE BINARY NEURAL NETWORKS

UNIFIED ACCELERATOR FOR CLASSICAL AND POST-QUANTUM DIGITAL SIGNATUR...

SECURE PUF-BASED DEVICE AUTHENTICATION USING ADVERSARIAL CHALLENGE...

LOW LATENCY POST-QUANTUM SIGNATURE VERIFICATION FOR FAST SECURE-BOOT

COMBINED SHA2 AND SHA3 BASED XMSS HARDWARE ACCELERATOR

TIME AND FREQUENCY DOMAIN SIDE-CHANNEL LEAKAGE SUPPRESSION USING IN...

ODD INDEX PRECOMPUTATION FOR AUTHENTICATION PATH COMPUTATION

ACCELERATORS FOR POST-QUANTUM CRYPTOGRAPHY SECURE HASH-BASED SIGNIN...

POST QUANTUM PUBLIC KEY SIGNATURE OPERATION FOR RECONFIGURABLE CIRC...