Rahul M. Rao

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Usage-based temporal degradation estimation for memory elements
- Patent number 9,064,071
- Issue date Jun 23, 2015
- International Business Machines Corporation
- Aditya Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Usage-based temporal degradation estimation for memory elements
- Patent number 9,058,448
- Issue date Jun 16, 2015
- International Business Machines Corporation
- Aditya Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Estimating delay deterioration due to device degradation in integra...
- Patent number 8,966,420
- Issue date Feb 24, 2015
- International Business Machines Corporation
- Aditya Bansal
- G01 - MEASURING TESTING
Information Patent Grant
Enhanced static random access memory stability using asymmetric acc...
- Patent number 8,526,219
- Issue date Sep 3, 2013
- International Business Machines Corporation
- Aditya Bansal
- G11 - INFORMATION STORAGE
Information Patent Grant
Performing logic functions on more than one memory cell within an a...
- Patent number 8,493,774
- Issue date Jul 23, 2013
- International Business Machines Corporation
- Jente B. Kuang
- G11 - INFORMATION STORAGE
Information Patent Grant
Monitoring negative bias temperature instability (NBTI) and/or posi...
- Patent number 8,456,247
- Issue date Jun 4, 2013
- International Business Machines Corporation
- Jae-Joon Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Enhanced static random access memory stability using asymmetric acc...
- Patent number 8,139,400
- Issue date Mar 20, 2012
- International Business Machines Corporation
- Aditya Bansal
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic circuit for measurement of transistor variability and th...
- Patent number 8,004,305
- Issue date Aug 23, 2011
- International Business Machines Corporation
- Keith A. Jenkins
- G01 - MEASURING TESTING
Information Patent Grant
Static pulsed bus circuit and method having dynamic power supply ra...
- Patent number 7,882,370
- Issue date Feb 1, 2011
- International Business Machines Corporation
- Harmander Singh Deogun
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Methods of operating an electronic circuit for measurement of trans...
- Patent number 7,764,080
- Issue date Jul 27, 2010
- International Business Machines Corporation
- Keith A. Jenkins
- G01 - MEASURING TESTING
Information Patent Grant
Memory circuit with decoupled read and write bit lines and improved...
- Patent number 7,746,709
- Issue date Jun 29, 2010
- International Business Machines Corporation
- Rajiv V. Joshi
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuits and design structures for monitoring NBTI (negative bias t...
- Patent number 7,642,864
- Issue date Jan 5, 2010
- International Business Machines Corporation
- Ching-Te K. Chuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and circuit for measuring operating and leakage current of i...
- Patent number 7,550,987
- Issue date Jun 23, 2009
- International Business Machines Corporation
- Dhruva J. Acharyya
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for determining the slew rate of a signal prod...
- Patent number 7,548,822
- Issue date Jun 16, 2009
- International Business Machines Corporation
- Ching-Te K. Chuang
- G01 - MEASURING TESTING
Information Patent Grant
Techniques for improving write stability of memory with decoupled r...
- Patent number 7,495,969
- Issue date Feb 24, 2009
- International Business Machines Corporation
- Rajiv V. Joshi
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic circuit for measurement of transistor variability and th...
- Patent number 7,439,755
- Issue date Oct 21, 2008
- International Business Machines Corporation
- Keith A. Jenkins
- G01 - MEASURING TESTING
Information Patent Grant
Multi-threshold complementary metal-oxide semiconductor (MTCMOS) bu...
- Patent number 7,088,141
- Issue date Aug 8, 2006
- International Business Machines Corporation
- Harmander Singh Deogun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Technique for mitigating gate leakage during a sleep state
- Patent number 6,791,361
- Issue date Sep 14, 2004
- International Business Machines Corporation
- Elad Alon
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
ESTIMATING DELAY DETERIORATION DUE TO DEVICE DEGRADATION IN INTEGRA...
- Publication number 20150154331
- Publication date Jun 4, 2015
- International Business Machines Corporation
- Aditya Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL-CELL MTJ STRUCTURE WITH INDIVIDUAL ACCESS AND LOGICAL COMBINAT...
- Publication number 20130258750
- Publication date Oct 3, 2013
- International Business Machines Corporation
- JAE-JOON KIM
- G11 - INFORMATION STORAGE
Information Patent Application
ESTIMATING DELAY DETERIORATION DUE TO DEVICE DEGRADATION IN INTEGRA...
- Publication number 20130253868
- Publication date Sep 26, 2013
- International Business Machines Corporation
- Aditya Bansal
- G01 - MEASURING TESTING
Information Patent Application
ESTIMATING DELAY DETERIORATION DUE TO DEVICE DEGRADATION IN INTEGRA...
- Publication number 20130254731
- Publication date Sep 26, 2013
- International Business Machines Corporation
- Aditya Bansal
- G01 - MEASURING TESTING
Information Patent Application
USAGE-BASED TEMPORAL DEGRADATION ESTIMATION FOR MEMORY ELEMENTS
- Publication number 20130138407
- Publication date May 30, 2013
- International Business Machines Corporation
- Aditya Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USAGE-BASED TEMPORAL DEGRADATION ESTIMATION FOR MEMORY ELEMENTS
- Publication number 20130138403
- Publication date May 30, 2013
- International Business Machines Corporation
- Aditya Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
On-Chip Delay Measurement Through a Transistor Array
- Publication number 20130049791
- Publication date Feb 28, 2013
- International Business Machines Corporation
- Keith A. Jenkins
- G01 - MEASURING TESTING
Information Patent Application
Performing Logic Functions on More Than One Memory Cell Within an A...
- Publication number 20120320689
- Publication date Dec 20, 2012
- International Business Machines Corporation
- Jente B. Kuang
- G11 - INFORMATION STORAGE
Information Patent Application
MONITORING NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI) AND/OR POSI...
- Publication number 20120182079
- Publication date Jul 19, 2012
- International Business Machines Corporation
- Jae-Joon Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced Static Random Access Memory Stability Using Asymmetric Acc...
- Publication number 20120185817
- Publication date Jul 19, 2012
- International Business Machines Corporation
- Aditya Bansal
- G11 - INFORMATION STORAGE
Information Patent Application
On-Chip Delay Measurement Through a Transistor Array
- Publication number 20120081141
- Publication date Apr 5, 2012
- International Business Machines Corporation
- Keith A. Jenkins
- G01 - MEASURING TESTING
Information Patent Application
ELECTRONIC CIRCUIT FOR MEASUREMENT OF TRANSISTOR VARIABILITY AND TH...
- Publication number 20090309625
- Publication date Dec 17, 2009
- International Business Machines Corporation
- Keith A. Jenkins
- G01 - MEASURING TESTING
Information Patent Application
CIRCUITS AND DESIGN STRUCTURES FOR MONITORING NBTI (NEGATIVE BIAS T...
- Publication number 20090189703
- Publication date Jul 30, 2009
- International Business Machines Corporation
- Ching-Te K. Chuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ENHANCED STATIC RANDOM ACCESS MEMORY STABILITY USING ASYMMETRIC ACC...
- Publication number 20090185409
- Publication date Jul 23, 2009
- International Business Machines Corporation
- Aditya Bansal
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Circuit with Decoupled Read and Write Bit Lines and Improved...
- Publication number 20090147592
- Publication date Jun 11, 2009
- International Business Machines Corporation
- Rajiv V. Joshi
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR DETERMINING THE SLEW RATE OF A SIGNAL PROD...
- Publication number 20090018787
- Publication date Jan 15, 2009
- International Business Machines Corporation
- Ching-Te K. Chuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Methods of Operating an Electronic Circuit for Measurement of Trans...
- Publication number 20080315907
- Publication date Dec 25, 2008
- International Business Machines Corporation
- Keith A. Jenkins
- G01 - MEASURING TESTING
Information Patent Application
Method and Circuit for Measuring Operating and Leakage Current of I...
- Publication number 20080209285
- Publication date Aug 28, 2008
- Dhruva J. Acharyya
- G01 - MEASURING TESTING
Information Patent Application
Techniques For Improving Write Stability Of Memory With Decoupled R...
- Publication number 20080181029
- Publication date Jul 31, 2008
- International Business Machines Corporation
- Rajiv V. Joshi
- G11 - INFORMATION STORAGE
Information Patent Application
Electronic Circuit for Measurement of Transistor Variability and th...
- Publication number 20080180134
- Publication date Jul 31, 2008
- International Business Machines Corporation
- Keith A. Jenkins
- G01 - MEASURING TESTING
Information Patent Application
FINFET drive strength de-quantization using multiple orientation fins
- Publication number 20080121948
- Publication date May 29, 2008
- International Business Machines Corporation
- Jae-Joon Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Static Pulsed Bus Circuit and Method Having Dynamic Power Supply Ra...
- Publication number 20080069558
- Publication date Mar 20, 2008
- Harmander Singh Deogun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-threshold complementary metal-oxide semiconductor (MTCMOS) bu...
- Publication number 20060082384
- Publication date Apr 20, 2006
- International Business Machines Corporation
- Harmander Singh Deogun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Technique for mitigating gate leakage during a sleep state
- Publication number 20040113657
- Publication date Jun 17, 2004
- International Business Machines Corporation
- Elad Alon
- H03 - BASIC ELECTRONIC CIRCUITRY

Rahul M. Rao

Person

Patents Grantslast 30 patents

Usage-based temporal degradation estimation for memory elements

Usage-based temporal degradation estimation for memory elements

Estimating delay deterioration due to device degradation in integra...

Enhanced static random access memory stability using asymmetric acc...

Performing logic functions on more than one memory cell within an a...

Monitoring negative bias temperature instability (NBTI) and/or posi...

Enhanced static random access memory stability using asymmetric acc...

Electronic circuit for measurement of transistor variability and th...

Static pulsed bus circuit and method having dynamic power supply ra...

Methods of operating an electronic circuit for measurement of trans...

Memory circuit with decoupled read and write bit lines and improved...

Circuits and design structures for monitoring NBTI (negative bias t...

Method and circuit for measuring operating and leakage current of i...

Apparatus and method for determining the slew rate of a signal prod...

Techniques for improving write stability of memory with decoupled r...

Electronic circuit for measurement of transistor variability and th...

Multi-threshold complementary metal-oxide semiconductor (MTCMOS) bu...

Technique for mitigating gate leakage during a sleep state

Patents Applicationslast 30 patents

ESTIMATING DELAY DETERIORATION DUE TO DEVICE DEGRADATION IN INTEGRA...

DUAL-CELL MTJ STRUCTURE WITH INDIVIDUAL ACCESS AND LOGICAL COMBINAT...

ESTIMATING DELAY DETERIORATION DUE TO DEVICE DEGRADATION IN INTEGRA...

ESTIMATING DELAY DETERIORATION DUE TO DEVICE DEGRADATION IN INTEGRA...

USAGE-BASED TEMPORAL DEGRADATION ESTIMATION FOR MEMORY ELEMENTS

USAGE-BASED TEMPORAL DEGRADATION ESTIMATION FOR MEMORY ELEMENTS

On-Chip Delay Measurement Through a Transistor Array

Performing Logic Functions on More Than One Memory Cell Within an A...

MONITORING NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI) AND/OR POSI...

Enhanced Static Random Access Memory Stability Using Asymmetric Acc...

On-Chip Delay Measurement Through a Transistor Array

ELECTRONIC CIRCUIT FOR MEASUREMENT OF TRANSISTOR VARIABILITY AND TH...

CIRCUITS AND DESIGN STRUCTURES FOR MONITORING NBTI (NEGATIVE BIAS T...

ENHANCED STATIC RANDOM ACCESS MEMORY STABILITY USING ASYMMETRIC ACC...

Memory Circuit with Decoupled Read and Write Bit Lines and Improved...

APPARATUS AND METHOD FOR DETERMINING THE SLEW RATE OF A SIGNAL PROD...

Methods of Operating an Electronic Circuit for Measurement of Trans...

Method and Circuit for Measuring Operating and Leakage Current of I...

Techniques For Improving Write Stability Of Memory With Decoupled R...

Electronic Circuit for Measurement of Transistor Variability and th...

FINFET drive strength de-quantization using multiple orientation fins

Static Pulsed Bus Circuit and Method Having Dynamic Power Supply Ra...

Multi-threshold complementary metal-oxide semiconductor (MTCMOS) bu...

Technique for mitigating gate leakage during a sleep state