Rajabali KODURI

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Die interconnection scheme for providing a high yielding process fo...
- Patent number 11,652,060
- Issue date May 16, 2023
- Intel Corporation
- Wilfred Gomes
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
STACKED SRAM WITH SHARED WORDLINE CONNECTION
- Publication number 20240008239
- Publication date Jan 4, 2024
- Intel Corporation
- Abhishek Anil Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
PERFORMING DISTRIBUTED PROCESSING USING DISTRIBUTED MEMORY
- Publication number 20230418508
- Publication date Dec 28, 2023
- Intel Corporation
- Abhishek Anil Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD TO IMPLEMENT CACHING AND COMPRESSION IN DRAM F...
- Publication number 20230315305
- Publication date Oct 5, 2023
- Abhishek Anil Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING FINE GRAIN ACCESS TO PACKAGE MEMORY
- Publication number 20230315334
- Publication date Oct 5, 2023
- Intel Corporation
- Abhishek Anil SHARMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE CONDUCTIVITY TYPE DEVICES FOR LOW TEMPERATURE COMPUTATION
- Publication number 20230317557
- Publication date Oct 5, 2023
- Intel Corporation
- Abhishek Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE EPITAXIAL LAYER SOURCE AND DRAIN TRANSISTORS FOR LOW TEMPE...
- Publication number 20230317558
- Publication date Oct 5, 2023
- Intel Corporation
- Abhishek Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH NARROW WIDTH INTERCONNECTS AND REDUCED RC...
- Publication number 20230317605
- Publication date Oct 5, 2023
- Intel Corporation
- Abhishek Anil Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ULTRA-SCALED TRANSISTOR DEVICES TO ENABLE CELL SIZE SCALING
- Publication number 20230317794
- Publication date Oct 5, 2023
- Intel Corporation
- Abhishek Anil Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Providing Orthogonal Subarrays in A Dynamic Random Access Memory
- Publication number 20230317140
- Publication date Oct 5, 2023
- Intel Corporation
- Abhishek Anil Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS TO IMPLEMENT AN INTEGRATED CIRCUIT TO OPERATE...
- Publication number 20230317145
- Publication date Oct 5, 2023
- Intel Corporation
- Abhishek Anil SHARMA
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS TO IMPLEMENT AN INTEGRATED CIRCUIT INCLUDING B...
- Publication number 20230315331
- Publication date Oct 5, 2023
- Intel Corporation
- Abhishek Anil SHARMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SRAM CELLS FOR LOW TEMPERATURE INTEGRATED CIRCUIT OPERATION
- Publication number 20230317146
- Publication date Oct 5, 2023
- Intel Corporation
- Abhishek Anil Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE INTERCONNECTION SCHEME FOR PROVIDING A HIGH YIELDING PROCESS FO...
- Publication number 20230245974
- Publication date Aug 3, 2023
- Intel Corporation
- Wilfred GOMES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVED EFFICIENT E-SPORTS SPECTATOR MODE...
- Publication number 20230186545
- Publication date Jun 15, 2023
- Intel Corporation
- Travis Schluessler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIE INTERCONNECTION SCHEME FOR PROVIDING A HIGH YIELDING PROCESS FO...
- Publication number 20200211970
- Publication date Jul 2, 2020
- Intel Corporation
- Wilfred GOMES
- H01 - BASIC ELECTRIC ELEMENTS

Rajabali KODURI

Person

Patents Grantslast 30 patents

Die interconnection scheme for providing a high yielding process fo...

Patents Applicationslast 30 patents

STACKED SRAM WITH SHARED WORDLINE CONNECTION

PERFORMING DISTRIBUTED PROCESSING USING DISTRIBUTED MEMORY

APPARATUS AND METHOD TO IMPLEMENT CACHING AND COMPRESSION IN DRAM F...

PROVIDING FINE GRAIN ACCESS TO PACKAGE MEMORY

SINGLE CONDUCTIVITY TYPE DEVICES FOR LOW TEMPERATURE COMPUTATION

MULTIPLE EPITAXIAL LAYER SOURCE AND DRAIN TRANSISTORS FOR LOW TEMPE...

INTEGRATED CIRCUITS WITH NARROW WIDTH INTERCONNECTS AND REDUCED RC...

ULTRA-SCALED TRANSISTOR DEVICES TO ENABLE CELL SIZE SCALING

Providing Orthogonal Subarrays in A Dynamic Random Access Memory

METHOD AND APPARATUS TO IMPLEMENT AN INTEGRATED CIRCUIT TO OPERATE...

METHOD AND APPARATUS TO IMPLEMENT AN INTEGRATED CIRCUIT INCLUDING B...

SRAM CELLS FOR LOW TEMPERATURE INTEGRATED CIRCUIT OPERATION

DIE INTERCONNECTION SCHEME FOR PROVIDING A HIGH YIELDING PROCESS FO...

SYSTEMS AND METHODS FOR IMPROVED EFFICIENT E-SPORTS SPECTATOR MODE...

DIE INTERCONNECTION SCHEME FOR PROVIDING A HIGH YIELDING PROCESS FO...