Rajat Agarwal

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method to reduce bandwidth and latency overheads of p...
- Patent number 12,124,371
- Issue date Oct 22, 2024
- Intel Corporation
- Ruchira Sasanka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient security metadata encoding in error correcting code (ECC)...
- Patent number 12,066,888
- Issue date Aug 20, 2024
- Intel Corporation
- Sergej Deutsch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Algebraic and deterministic memory authentication and correction wi...
- Patent number 11,995,006
- Issue date May 28, 2024
- Intel Corporation
- Sergej Deutsch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read retry to selectively disable on-die ECC
- Patent number 11,966,286
- Issue date Apr 23, 2024
- Intel Corporation
- Kuljit S. Bains
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for fast booting with error-correcting code memory
- Patent number 11,960,900
- Issue date Apr 16, 2024
- Intel Corporation
- Murugasamy K. Nachimuthu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnect architecture with silicon interposer and EMIB
- Patent number 11,901,299
- Issue date Feb 13, 2024
- Intel Corporation
- Md Altaf Hossain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Undo and redo of soft post package repair
- Patent number 11,837,314
- Issue date Dec 5, 2023
- SK Hynix NAND Product Solutions Corp.
- Bill Nale
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system, computing system, and methods thereof for cache inva...
- Patent number 11,580,029
- Issue date Feb 14, 2023
- Intel Corporation
- Andy Rudoff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory utilized as both system memory and near memory
- Patent number 11,567,877
- Issue date Jan 31, 2023
- Intel Corporation
- Suresh S. Chittor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnect architecture with silicon interposer and EMIB
- Patent number 11,557,541
- Issue date Jan 17, 2023
- Intel Corporation
- Md Altaf Hossain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low overhead integrity protection with high availability for trust...
- Patent number 11,397,692
- Issue date Jul 26, 2022
- Intel Corporation
- Siddhartha Chhabra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read retry to selectively disable on-die ECC
- Patent number 11,314,589
- Issue date Apr 26, 2022
- Intel Corporation
- Kuljit S. Bains
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cryptographic system memory management
- Patent number 11,196,565
- Issue date Dec 7, 2021
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for implementing a multi-level memory hierarch...
- Patent number 11,132,298
- Issue date Sep 28, 2021
- Intel Corporation
- Raj K. Ramanujan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Key rotating trees with split counters for efficient hardware repla...
- Patent number 11,088,846
- Issue date Aug 10, 2021
- Intel Corporation
- Siddhartha Chhabra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus, system, and method to flush modified data from a volatil...
- Patent number 11,036,634
- Issue date Jun 15, 2021
- Intel Corporation
- Wei Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for selective enabling of locality-bas...
- Patent number 11,030,108
- Issue date Jun 8, 2021
- Intel Corporation
- Berkin Akin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Replay protection for memory based on key refresh
- Patent number 11,019,098
- Issue date May 25, 2021
- Intel Corporation
- Sergej Deutsch
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Memory with reduced exposure to manufacturing related data corrupti...
- Patent number 11,010,304
- Issue date May 18, 2021
- Intel Corporation
- Uksong Kang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system, computing system, and methods thereof for cache inva...
- Patent number 10,997,082
- Issue date May 4, 2021
- Intel Corporation
- Andy Rudoff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High bandwidth DIMM
- Patent number 10,963,404
- Issue date Mar 30, 2021
- Intel Corporation
- James A. McCall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing conflicts in direct mapped caches
- Patent number 10,901,899
- Issue date Jan 26, 2021
- Intel Corporation
- Ruchira Sasanka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DIMM for a high bandwidth memory channel
- Patent number 10,884,958
- Issue date Jan 5, 2021
- Intel Corporation
- Rajat Agarwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for multi-cacheline small object memor...
- Patent number 10,877,897
- Issue date Dec 29, 2020
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Internal error checking and correction (ECC) with extra system bits
- Patent number 10,872,011
- Issue date Dec 22, 2020
- Intel Corporation
- Kuljit S. Bains
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction code memory security
- Patent number 10,725,861
- Issue date Jul 28, 2020
- Intel Corporation
- Anatoli Bolotov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for implementing a multi-level memory hierarchy
- Patent number 10,719,443
- Issue date Jul 21, 2020
- Intel Corporation
- Raj K. Ramanujan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cryptographic system memory management
- Patent number 10,594,491
- Issue date Mar 17, 2020
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for partial cache line sparing
- Patent number 10,579,464
- Issue date Mar 3, 2020
- Intel Corporation
- Debaleena Das
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stacked memory chip device with enhanced data protection capability
- Patent number 10,459,809
- Issue date Oct 29, 2019
- Intel Corporation
- Hussein Alameer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ADAPTIVE INTERNAL ERROR SCRUBBING AND ERROR HANDLING
- Publication number 20240211344
- Publication date Jun 27, 2024
- Intel Corporation
- Kuljit S. BAINS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB
- Publication number 20240145395
- Publication date May 2, 2024
- Intel Corporation
- MD Altaf HOSSAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ADAPTIVE ERROR CORRECTION TO IMPROVE SYSTEM MEMORY RELIABILITY, AVA...
- Publication number 20240061741
- Publication date Feb 22, 2024
- Intel Corporation
- Rajat AGARWAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT SECURITY METADATA ENCODING IN ERROR CORRECTING CODE (ECC)...
- Publication number 20240053904
- Publication date Feb 15, 2024
- Intel Corporation
- Sergej Deutsch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MESSAGE AUTHENTICATION GALOIS INTEGRITY AND CORRECTION (MAGIC) FOR...
- Publication number 20230402077
- Publication date Dec 14, 2023
- Intel Corporation
- Sergej Deutsch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus, Device, and Method for a Memory Controller, Memory Contr...
- Publication number 20230400996
- Publication date Dec 14, 2023
- Intel Corporation
- Sergej DEUTSCH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB
- Publication number 20230107106
- Publication date Apr 6, 2023
- Intel Corporation
- MD Altaf HOSSAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY ACCESS TRACKER IN DEVICE PRIVATE MEMORY
- Publication number 20230093247
- Publication date Mar 23, 2023
- Intel Corporation
- Sanjay Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNCORRECTABLE MEMORY ERROR PREDICTION
- Publication number 20230083193
- Publication date Mar 16, 2023
- Intel Corporation
- Shen ZHOU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLEXED RANKS (MR) WITH PSEUDO BURST LENGTH 32 (BL32)
- Publication number 20230071117
- Publication date Mar 9, 2023
- Intel Corporation
- Hussein ALAMEER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW OVERHEAD INTEGRITY PROTECTION WITH HIGH AVAILABILITY FOR TRUST...
- Publication number 20220365885
- Publication date Nov 17, 2022
- Intel Corporation
- Siddhartha Chhabra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EMBEDDED CONTROLLER AND MEMORY TO STORE MEMORY ERROR INFORMATION
- Publication number 20220350500
- Publication date Nov 3, 2022
- Intel Corporation
- Wei P. CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD TO REDUCE BANDWIDTH AND LATENCY OVERHEADS OF P...
- Publication number 20220308998
- Publication date Sep 29, 2022
- Intel Corporation
- Ruchira Sasanka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ RETRY TO SELECTIVELY DISABLE ON-DIE ECC
- Publication number 20220229724
- Publication date Jul 21, 2022
- Intel Corporation
- Kuljit S. BAINS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC MULTILEVEL MEMORY SYSTEM
- Publication number 20220229575
- Publication date Jul 21, 2022
- Intel Corporation
- Wei P. CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE FILL FOR LOGICAL CONTROL OVER HARDWARE MULTILEVEL MEMORY
- Publication number 20220222178
- Publication date Jul 14, 2022
- Intel Corporation
- Rajat AGARWAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW OVERHEAD MEMORY INTEGRITY WITH ERROR CORRECTION CAPABILITIES
- Publication number 20220207190
- Publication date Jun 30, 2022
- Intel Corporation
- Siddhartha CHHABRA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALGEBRAIC AND DETERMINISTIC MEMORY AUTHENTICATION AND CORRECTION WI...
- Publication number 20220114112
- Publication date Apr 14, 2022
- Intel Corporation
- Sergej Deutsch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST MEMORY ECC ERROR CORRECTION
- Publication number 20220107866
- Publication date Apr 7, 2022
- Intel Corporation
- Jing LING
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CRYPTOGRAPHIC SYSTEM MEMORY MANAGEMENT
- Publication number 20220094553
- Publication date Mar 24, 2022
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY BUS INTEGRITY AND DATA ENCRYPTION (IDE)
- Publication number 20210336767
- Publication date Oct 28, 2021
- Intel Corporation
- Raghunandan MAKARAM
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MEMORY SYSTEM, COMPUTING SYSTEM, AND METHODS THEREOF
- Publication number 20210263855
- Publication date Aug 26, 2021
- Intel Corporation
- Andy Rudoff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO-LEVEL MAIN MEMORY HIERARCHY MANAGEMENT
- Publication number 20210216452
- Publication date Jul 15, 2021
- Intel Corporation
- Sai Prashanth MURALIDHARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTION OF ERROR CHECKING AND CORRECTION (ECC) BITS TO ALLOCAT...
- Publication number 20210141692
- Publication date May 13, 2021
- Intel Corporation
- Rajat AGARWAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ RETRY TO SELECTIVELY DISABLE ON-DIE ECC
- Publication number 20200278906
- Publication date Sep 3, 2020
- Intel Corporation
- Kuljit S. BAINS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB
- Publication number 20200211969
- Publication date Jul 2, 2020
- Intel Corporation
- MD Altaf HOSSAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SCALABLE MULTI-KEY TOTAL MEMORY ENCRYPTION ENGINE
- Publication number 20200201787
- Publication date Jun 25, 2020
- Intel Corporation
- Vedvyas Shanbhogue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNDO AND REDO OF SOFT POST PACKAGE REPAIR
- Publication number 20200185052
- Publication date Jun 11, 2020
- Intel Corporation
- Bill Nale
- G11 - INFORMATION STORAGE
Information Patent Application
CRYPTOGRAPHIC SYSTEM MEMORY MANAGEMENT
- Publication number 20200177392
- Publication date Jun 4, 2020
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR FAST BOOTING WITH ERROR-CORRECTING CODE MEMORY
- Publication number 20200133683
- Publication date Apr 30, 2020
- Intel Corporation
- Murugasamy K. Nachimuthu
- G06 - COMPUTING CALCULATING COUNTING

Rajat Agarwal

Person

Patents Grantslast 30 patents

Apparatus and method to reduce bandwidth and latency overheads of p...

Efficient security metadata encoding in error correcting code (ECC)...

Algebraic and deterministic memory authentication and correction wi...

Read retry to selectively disable on-die ECC

Technologies for fast booting with error-correcting code memory

Interconnect architecture with silicon interposer and EMIB

Undo and redo of soft post package repair

Memory system, computing system, and methods thereof for cache inva...

Memory utilized as both system memory and near memory

Interconnect architecture with silicon interposer and EMIB

Low overhead integrity protection with high availability for trust...

Read retry to selectively disable on-die ECC

Cryptographic system memory management

Apparatus and method for implementing a multi-level memory hierarch...

Key rotating trees with split counters for efficient hardware repla...

Apparatus, system, and method to flush modified data from a volatil...

System, apparatus and method for selective enabling of locality-bas...

Replay protection for memory based on key refresh

Memory with reduced exposure to manufacturing related data corrupti...

Memory system, computing system, and methods thereof for cache inva...

High bandwidth DIMM

Reducing conflicts in direct mapped caches

DIMM for a high bandwidth memory channel

System, apparatus and method for multi-cacheline small object memor...

Internal error checking and correction (ECC) with extra system bits

Error correction code memory security

Apparatus and method for implementing a multi-level memory hierarchy

Cryptographic system memory management

Method and apparatus for partial cache line sparing

Stacked memory chip device with enhanced data protection capability

Patents Applicationslast 30 patents

ADAPTIVE INTERNAL ERROR SCRUBBING AND ERROR HANDLING

INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB

ADAPTIVE ERROR CORRECTION TO IMPROVE SYSTEM MEMORY RELIABILITY, AVA...

EFFICIENT SECURITY METADATA ENCODING IN ERROR CORRECTING CODE (ECC)...

MESSAGE AUTHENTICATION GALOIS INTEGRITY AND CORRECTION (MAGIC) FOR...

Apparatus, Device, and Method for a Memory Controller, Memory Contr...

INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB

MEMORY ACCESS TRACKER IN DEVICE PRIVATE MEMORY

UNCORRECTABLE MEMORY ERROR PREDICTION

MULTIPLEXED RANKS (MR) WITH PSEUDO BURST LENGTH 32 (BL32)

LOW OVERHEAD INTEGRITY PROTECTION WITH HIGH AVAILABILITY FOR TRUST...

EMBEDDED CONTROLLER AND MEMORY TO STORE MEMORY ERROR INFORMATION

APPARATUS AND METHOD TO REDUCE BANDWIDTH AND LATENCY OVERHEADS OF P...

READ RETRY TO SELECTIVELY DISABLE ON-DIE ECC

DYNAMIC MULTILEVEL MEMORY SYSTEM

SELECTIVE FILL FOR LOGICAL CONTROL OVER HARDWARE MULTILEVEL MEMORY

LOW OVERHEAD MEMORY INTEGRITY WITH ERROR CORRECTION CAPABILITIES

ALGEBRAIC AND DETERMINISTIC MEMORY AUTHENTICATION AND CORRECTION WI...

FAST MEMORY ECC ERROR CORRECTION

CRYPTOGRAPHIC SYSTEM MEMORY MANAGEMENT

MEMORY BUS INTEGRITY AND DATA ENCRYPTION (IDE)

MEMORY SYSTEM, COMPUTING SYSTEM, AND METHODS THEREOF

TWO-LEVEL MAIN MEMORY HIERARCHY MANAGEMENT

DISTRIBUTION OF ERROR CHECKING AND CORRECTION (ECC) BITS TO ALLOCAT...

READ RETRY TO SELECTIVELY DISABLE ON-DIE ECC

INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB

SCALABLE MULTI-KEY TOTAL MEMORY ENCRYPTION ENGINE

UNDO AND REDO OF SOFT POST PACKAGE REPAIR

CRYPTOGRAPHIC SYSTEM MEMORY MANAGEMENT

TECHNOLOGIES FOR FAST BOOTING WITH ERROR-CORRECTING CODE MEMORY