Rajesh Kumar Mittal

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Generating multiple pseudo static control signals using on-chip JTA...
- Patent number 11,899,063
- Issue date Feb 13, 2024
- Texas Instruments Incorporated
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Grant
Generating multiple pseudo static control signals using on-chip JTA...
- Patent number 11,408,936
- Issue date Aug 9, 2022
- Texas Instruments Incorporated
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Grant
Non-interleaved scan operation for achieving higher scan throughput...
- Patent number 10,877,093
- Issue date Dec 29, 2020
- Texas Instruments Incorporated
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Grant
Generating multiple pseudo static control signals using on-chip JTA...
- Patent number 10,739,402
- Issue date Aug 11, 2020
- Texas Instruments Incorporated
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Grant
Full pad coverage boundary scan
- Patent number 10,274,538
- Issue date Apr 30, 2019
- Texas Instruments Incorporated
- Prakash Narayanan
- G01 - MEASURING TESTING
Information Patent Grant
Non-interleaved scan operation for achieving higher scan throughput...
- Patent number 10,088,525
- Issue date Oct 2, 2018
- Texas Instruments Incorporated
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Grant
Generating multiple pseudo static control signals using on-chip JTA...
- Patent number 10,060,979
- Issue date Aug 28, 2018
- Texas Instruments Incorporated
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for test time reduction using fractional data...
- Patent number 9,970,987
- Issue date May 15, 2018
- Texas Instruments Incorporated
- Sreenath Narayanan Potty
- G01 - MEASURING TESTING
Information Patent Grant
Full pad coverage boundary scan
- Patent number 9,791,505
- Issue date Oct 17, 2017
- Texas Instruments Incorporated
- Prakash Narayanan
- G01 - MEASURING TESTING
Information Patent Grant
Increase data transfer throughput by enabling dynamic JTAG test mod...
- Patent number 9,772,376
- Issue date Sep 26, 2017
- Texas Instruments Incorporated
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Grant
Test circuit providing different levels of concurrency among radio...
- Patent number 9,581,645
- Issue date Feb 28, 2017
- Texas Instruments Incorporated
- Adesh Sontakke
- G01 - MEASURING TESTING
Information Patent Grant
Frequency scaled segmented scan chain for integrated circuits
- Patent number 9,535,123
- Issue date Jan 3, 2017
- Texas Instruments Incorporated
- Rajesh Kumar Mittal
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for test time reduction using fractional data...
- Patent number 9,448,284
- Issue date Sep 20, 2016
- Texas Instruments Incorporated
- Sreenath Narayanan Potty
- G01 - MEASURING TESTING
Information Patent Grant
Scan throughput enhancement in scan testing of a device-under-test
- Patent number 9,347,991
- Issue date May 24, 2016
- Texas Instruments Incorporated
- Mudasir Shafat Kawoosa
- G11 - INFORMATION STORAGE
Information Patent Grant
Handling slower scan outputs at optimal frequency
- Patent number 9,261,560
- Issue date Feb 16, 2016
- Texas Instruments Incorporated
- Rajesh Kumar Mittal
- G01 - MEASURING TESTING
Information Patent Grant
DFT approach to enable faster scan chain diagnosis
- Patent number 9,239,360
- Issue date Jan 19, 2016
- Texas Instruments Incorporated
- Rajesh Kumar Mittal
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuits capable of generating test mode control signals...
- Patent number 8,972,807
- Issue date Mar 3, 2015
- Texas Instruments Incorporated
- Rajesh Mittal
- G01 - MEASURING TESTING
Information Patent Grant
Built-in self-test methods, circuits and apparatus for concurrent t...
- Patent number 8,694,276
- Issue date Apr 8, 2014
- Texas Instruments Incorporated
- Adesh Sharadrao Sontakke
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
GENERATING MULTIPLE PSEUDO STATIC CONTROL SIGNALS USING ON-CHIP JTA...
- Publication number 20220326303
- Publication date Oct 13, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Application
GENERATING MULTIPLE PSEUDO STATIC CONTROL SIGNALS USING ON-CHIP JTA...
- Publication number 20200333397
- Publication date Oct 22, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Application
NON-INTERLEAVED SCAN OPERATION FOR ACHIEVING HIGHER SCAN THROUGHPUT...
- Publication number 20180372798
- Publication date Dec 27, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Application
GENERATING MULTIPLE PSEUDO STATIC CONTROL SIGNALS USING ON-CHIP JTA...
- Publication number 20180321311
- Publication date Nov 8, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Application
Full Pad Coverage Boundary Scan
- Publication number 20180045778
- Publication date Feb 15, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Prakash Narayanan
- G01 - MEASURING TESTING
Information Patent Application
Generating Multiple Pseudo Static Control Signals Using On-chip JTA...
- Publication number 20180038910
- Publication date Feb 8, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Application
Full Pad Coverage Boundary Scan
- Publication number 20170315174
- Publication date Nov 2, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Prakash Narayanan
- G01 - MEASURING TESTING
Information Patent Application
Non-Interleaved Scan Operation for Achieving Higher Scan Throughput...
- Publication number 20170234925
- Publication date Aug 17, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Application
Method and Apparatus for Test Time Reduction Using Fractional Data...
- Publication number 20160356849
- Publication date Dec 8, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Sreenath Narayanan Potty
- G01 - MEASURING TESTING
Information Patent Application
Frequency Scaled Segmented Scan Chain for Integrated Circuits
- Publication number 20160266202
- Publication date Sep 15, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Rajesh Kumar Mittal
- G01 - MEASURING TESTING
Information Patent Application
SCAN THROUGHPUT ENHANCEMENT IN SCAN TESTING OF A DEVICE-UNDER-TEST
- Publication number 20160131704
- Publication date May 12, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Mudasir Shafat Kawoosa
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR TEST TIME REDUCTION USING FRACTIONAL DATA...
- Publication number 20150323596
- Publication date Nov 12, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Sreenath Narayanan Potty
- G01 - MEASURING TESTING
Information Patent Application
DFT APPROACH TO ENABLE FASTER SCAN CHAIN DIAGNOSIS
- Publication number 20150212150
- Publication date Jul 30, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Rajesh Kumar Mittal
- G01 - MEASURING TESTING
Information Patent Application
HANDLING SLOWER SCAN OUTPUTS AT OPTIMAL FREQUENCY
- Publication number 20150185283
- Publication date Jul 2, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Rajesh Kumar Mittal
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN SELF-TEST METHODS, CIRCUITS AND APPARATUS FOR CONCURRENT T...
- Publication number 20140232422
- Publication date Aug 21, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Adesh Sontakke
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUITS CAPABLE OF GENERATING TEST MODE CONTROL SIGNALS...
- Publication number 20130305106
- Publication date Nov 14, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Rajesh Mittal
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN SELF-TEST METHODS, CIRCUITS AND APPARATUS FOR CONCURRENT T...
- Publication number 20120191400
- Publication date Jul 26, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Adesh Sharadrao Sontakke
- G01 - MEASURING TESTING

Rajesh Kumar Mittal

Person

Patents Grantslast 30 patents

Generating multiple pseudo static control signals using on-chip JTA...

Generating multiple pseudo static control signals using on-chip JTA...

Non-interleaved scan operation for achieving higher scan throughput...

Generating multiple pseudo static control signals using on-chip JTA...

Full pad coverage boundary scan

Non-interleaved scan operation for achieving higher scan throughput...

Generating multiple pseudo static control signals using on-chip JTA...

Method and apparatus for test time reduction using fractional data...

Full pad coverage boundary scan

Increase data transfer throughput by enabling dynamic JTAG test mod...

Test circuit providing different levels of concurrency among radio...

Frequency scaled segmented scan chain for integrated circuits

Method and apparatus for test time reduction using fractional data...

Scan throughput enhancement in scan testing of a device-under-test

Handling slower scan outputs at optimal frequency

DFT approach to enable faster scan chain diagnosis

Integrated circuits capable of generating test mode control signals...

Built-in self-test methods, circuits and apparatus for concurrent t...

Patents Applicationslast 30 patents

GENERATING MULTIPLE PSEUDO STATIC CONTROL SIGNALS USING ON-CHIP JTA...

GENERATING MULTIPLE PSEUDO STATIC CONTROL SIGNALS USING ON-CHIP JTA...

NON-INTERLEAVED SCAN OPERATION FOR ACHIEVING HIGHER SCAN THROUGHPUT...

GENERATING MULTIPLE PSEUDO STATIC CONTROL SIGNALS USING ON-CHIP JTA...

Full Pad Coverage Boundary Scan

Generating Multiple Pseudo Static Control Signals Using On-chip JTA...

Full Pad Coverage Boundary Scan

Non-Interleaved Scan Operation for Achieving Higher Scan Throughput...

Method and Apparatus for Test Time Reduction Using Fractional Data...

Frequency Scaled Segmented Scan Chain for Integrated Circuits

SCAN THROUGHPUT ENHANCEMENT IN SCAN TESTING OF A DEVICE-UNDER-TEST

METHOD AND APPARATUS FOR TEST TIME REDUCTION USING FRACTIONAL DATA...

DFT APPROACH TO ENABLE FASTER SCAN CHAIN DIAGNOSIS

HANDLING SLOWER SCAN OUTPUTS AT OPTIMAL FREQUENCY

BUILT-IN SELF-TEST METHODS, CIRCUITS AND APPARATUS FOR CONCURRENT T...

INTEGRATED CIRCUITS CAPABLE OF GENERATING TEST MODE CONTROL SIGNALS...

BUILT-IN SELF-TEST METHODS, CIRCUITS AND APPARATUS FOR CONCURRENT T...