Rajesh Maruti Bhagwat

Person

Pune, IN

People

Patents Grantslast 30 patents

Information Patent Grant
No latency hardware interposer
- Patent number 12,099,642
- Issue date Sep 24, 2024
- Seagate Technology LLC
- Rajesh Maruti Bhagwat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-chip NVM ISP emulation in FPGA
- Patent number 12,061,701
- Issue date Aug 13, 2024
- Seagate Technology LLC
- Hemant Mane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On demand configuration of FPGA interfaces
- Patent number 11,880,568
- Issue date Jan 23, 2024
- Seagate Technology LLC
- Rajesh Maruti Bhagwat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Centralized power loss management system for data storage devices
- Patent number 10,976,795
- Issue date Apr 13, 2021
- Seagate Technology LLC
- Deepak Nayak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rapid scan testing of integrated circuit chips
- Patent number 10,921,372
- Issue date Feb 16, 2021
- Seagate Technology LLC
- Rajesh Maruti Bhagwat
- G01 - MEASURING TESTING
Information Patent Grant
Hybrid storage device partitions with storage tiers
- Patent number 10,915,262
- Issue date Feb 9, 2021
- Seagate Technology LLC
- Rajesh Maruti Bhagwat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data center power distribution system
- Patent number 10,847,994
- Issue date Nov 24, 2020
- Seagate Technology LLC
- Hemant Mohan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed compute array in a storage system
- Patent number 10,802,753
- Issue date Oct 13, 2020
- Seagate Technology LLC
- Nitin Kabra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Robust secure testing of integrated circuits
- Patent number 10,481,205
- Issue date Nov 19, 2019
- Seagate Technology LLC
- Rajesh Maruti Bhagwat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rapid scan testing of integrated circuit chips
- Patent number 10,353,001
- Issue date Jul 16, 2019
- Seagate Technology LLC
- Rajesh Maruti Bhagwat
- G01 - MEASURING TESTING
Information Patent Grant
Rapid system debugging using finite state machines
- Patent number 10,127,126
- Issue date Nov 13, 2018
- Seagate Technology LLC
- Rajesh Maruti Bhagwat
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
NO LATENCY HARDWARE INTERPOSER
- Publication number 20230259661
- Publication date Aug 17, 2023
- SEAGATE TECHNOLOGY LLC
- Rajesh Maruti Bhagwat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON DEMAND CONFIGURATION OF FPGA INTERFACES
- Publication number 20230152970
- Publication date May 18, 2023
- Seagate Technology LLC
- Rajesh Maruti BHAGWAT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-CHIP NVM ISP EMULATION IN FPGA
- Publication number 20220244851
- Publication date Aug 4, 2022
- SEAGATE TECHNOLOGY LLC
- Hemant MANE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CENTRALIZED POWER LOSS MANAGEMENT SYSTEM FOR DATA STORAGE DEVICES
- Publication number 20200348742
- Publication date Nov 5, 2020
- SEAGATE TECHNOLOGY LLC
- Deepak Nayak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA CENTER POWER DISTRIBUTION SYSTEM
- Publication number 20200295591
- Publication date Sep 17, 2020
- SEAGATE TECHNOLOGY LLC
- Hemant Mohan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RAPID SCAN TESTING OF INTEGRATED CIRCUIT CHIPS
- Publication number 20190339326
- Publication date Nov 7, 2019
- SEAGATE TECHNOLOGY LLC
- Rajesh Maruti Bhagwat
- G01 - MEASURING TESTING
Information Patent Application
HYBRID STORAGE DEVICE PARTITIONS WITH STORAGE TIERS
- Publication number 20190286355
- Publication date Sep 19, 2019
- SEAGATE TECHNOLOGY LLC
- Rajesh Maruti Bhagwat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED COMPUTE ARRAY IN A STORAGE SYSTEM
- Publication number 20190250852
- Publication date Aug 15, 2019
- SEAGATE TECHNOLOGY LLC
- Nitin Kabra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE CACHING IN A STORAGE DEVICE
- Publication number 20190065404
- Publication date Feb 28, 2019
- SEAGATE TECHNOLOGY LLC
- Nitin Satishchandra Kabra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROBUST SECURE TESTING OF INTEGRATED CIRCUITS
- Publication number 20190033374
- Publication date Jan 31, 2019
- SEAGATE TECHNOLOGY LLC
- Rajesh Maruti Bhagwat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RAPID SCAN TESTING OF INTEGRATED CIRCUIT CHIPS
- Publication number 20180348298
- Publication date Dec 6, 2018
- SEAGATE TECHNOLOGY LLC
- Rajesh Maruti Bhagwat
- G01 - MEASURING TESTING
Information Patent Application
RAPID SYSTEM DEBUGGING USING FINITE STATE MACHINES
- Publication number 20170329686
- Publication date Nov 16, 2017
- SEAGATE TECHNOLOGY LLC
- Rajesh Maruti Bhagwat
- G06 - COMPUTING CALCULATING COUNTING

Rajesh Maruti Bhagwat

Person

Patents Grantslast 30 patents

No latency hardware interposer

On-chip NVM ISP emulation in FPGA

On demand configuration of FPGA interfaces

Centralized power loss management system for data storage devices

Rapid scan testing of integrated circuit chips

Hybrid storage device partitions with storage tiers

Data center power distribution system

Distributed compute array in a storage system

Robust secure testing of integrated circuits

Rapid scan testing of integrated circuit chips

Rapid system debugging using finite state machines

Patents Applicationslast 30 patents

NO LATENCY HARDWARE INTERPOSER

ON DEMAND CONFIGURATION OF FPGA INTERFACES

ON-CHIP NVM ISP EMULATION IN FPGA

CENTRALIZED POWER LOSS MANAGEMENT SYSTEM FOR DATA STORAGE DEVICES

DATA CENTER POWER DISTRIBUTION SYSTEM

RAPID SCAN TESTING OF INTEGRATED CIRCUIT CHIPS

HYBRID STORAGE DEVICE PARTITIONS WITH STORAGE TIERS

DISTRIBUTED COMPUTE ARRAY IN A STORAGE SYSTEM

ADAPTIVE CACHING IN A STORAGE DEVICE

ROBUST SECURE TESTING OF INTEGRATED CIRCUITS

RAPID SCAN TESTING OF INTEGRATED CIRCUIT CHIPS

RAPID SYSTEM DEBUGGING USING FINITE STATE MACHINES