Rajit Manohar

Person

New York, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Neuromorphic event-driven neural computing architecture in a scalab...
- Patent number 11,580,366
- Issue date Feb 14, 2023
- International Business Machines Corporation
- Filipp Akopyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power asynchronous GPS baseband processor
- Patent number 10,705,223
- Issue date Jul 7, 2020
- Cornell University
- Rajit Manohar
- G01 - MEASURING TESTING
Information Patent Grant
Neuromorphic event-driven neural computing architecture in a scalab...
- Patent number 10,504,021
- Issue date Dec 10, 2019
- International Business Machines Corporation
- Filipp Akopyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for synchronization between multiple clock domains
- Patent number 10,355,851
- Issue date Jul 16, 2019
- Cornell University
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power asynchronous GPS baseband processor
- Patent number 10,126,428
- Issue date Nov 13, 2018
- Cornell University
- Rajit Manohar
- G01 - MEASURING TESTING
Information Patent Grant
Methods and systems for synchronization between multiple clock domains
- Patent number 9,985,774
- Issue date May 29, 2018
- Cornell University
- Rajit Manohar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Automated layout for integrated circuits with nonstandard cells
- Patent number 9,852,253
- Issue date Dec 26, 2017
- Cornell University
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Energy-efficient pipeline circuit templates for high-performance as...
- Patent number 9,633,157
- Issue date Apr 25, 2017
- Cornell University
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for zero-delay wakeup for power gated asynchron...
- Patent number 9,531,194
- Issue date Dec 27, 2016
- Cornell University
- Rajit Manohar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Operand-optimized asynchronous floating-point units and method of u...
- Patent number 9,524,270
- Issue date Dec 20, 2016
- Cornell University
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous pipelined interconnect architecture with fanout support
- Patent number 9,344,385
- Issue date May 17, 2016
- Achronix Semiconductor Corporation
- Virantha Ekanayake
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Neuromorphic event-driven neural computing architecture in a scalab...
- Patent number 9,269,044
- Issue date Feb 23, 2016
- International Business Machines Corporation
- Filipp Akopyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous pipelined interconnect architecture with fanout support
- Patent number 8,964,795
- Issue date Feb 24, 2015
- Achronix Semiconductor Corporation
- Rajit Manohar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reconfigurable logic fabrics for integrated circuits and systems an...
- Patent number 8,949,759
- Issue date Feb 3, 2015
- Achronix Semiconductor Corporation
- Rajit Manohar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Neuromorphic event-driven neural computing architecture in a scalab...
- Patent number 8,909,576
- Issue date Dec 9, 2014
- International Business Machines Corporation
- Filipp Akopyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asychronous system analysis
- Patent number 8,661,378
- Issue date Feb 25, 2014
- Achronix Semiconductor Corporation
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
One phase logic
- Patent number 8,593,176
- Issue date Nov 26, 2013
- Achronix Semiconductor Corporation
- Raymond Nijssen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reconfigurable logic fabrics for integrated circuits and systems an...
- Patent number 8,575,959
- Issue date Nov 5, 2013
- Achronix Semiconductor Corporation
- Rajit Manohar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Automated conversion of synchronous to asynchronous circuit design...
- Patent number 8,453,079
- Issue date May 28, 2013
- Achronix Semiconductor Corporation
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reset mechanism conversion
- Patent number 8,443,315
- Issue date May 14, 2013
- Achronix Semiconductor Corporation
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Converting a synchronous circuit design into an asynchronous design
- Patent number 8,375,339
- Issue date Feb 12, 2013
- Achronix Semiconductor Corporation
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable crossbar structures in asynchronous systems
- Patent number 8,300,635
- Issue date Oct 30, 2012
- Achronix Semiconductor Corporation
- Virantha Ekanayake
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multi-clock asynchronous logic circuits
- Patent number 8,301,933
- Issue date Oct 30, 2012
- Achronix Semiconductor Corporation
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronous to asynchronous logic conversion
- Patent number 8,291,358
- Issue date Oct 16, 2012
- Achronix Semiconductor Corporation
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Token enhanced asynchronous conversion of synchonous circuits
- Patent number 8,234,607
- Issue date Jul 31, 2012
- Achronix Semiconductor Corporation
- Virantha Ekanayake
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault tolerant asynchronous circuits
- Patent number 8,222,915
- Issue date Jul 17, 2012
- Achronix Semiconductor Corporation
- Rajit Manohar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Non-predicated to predicated conversion of asynchronous representat...
- Patent number 8,191,019
- Issue date May 29, 2012
- Achronix Semiconductor Corporation
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reset mechanism conversion
- Patent number 8,161,435
- Issue date Apr 17, 2012
- Achronix Semiconductor Corporation
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable logic fabrics for integrated circuits and systems an...
- Patent number 8,125,242
- Issue date Feb 28, 2012
- Achronix Semiconductor Corporation
- Rajit Manohar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
One phase logic
- Patent number 8,106,683
- Issue date Jan 31, 2012
- Achronix Semiconductor Corporation
- Raymond Nijssen
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
DISTRIBUTED SYSTEM OF COMPUTER ARCHITECTURES
- Publication number 20240419496
- Publication date Dec 19, 2024
- Yale University
- Abhishek Bhattacharjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OBJECT LINEARIZATION FOR COMMUNICATIONS
- Publication number 20230176934
- Publication date Jun 8, 2023
- Intel Corporation
- Robert SOULE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATION OF COMMUNICATIONS
- Publication number 20230161652
- Publication date May 25, 2023
- Intel Corporation
- Robert SOULE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR, EXTENSIBLE COMPUTER PROCESSING ARCHITECTURE
- Publication number 20210182073
- Publication date Jun 17, 2021
- Yale University
- Ioannis Karageorgos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEUROMORPHIC EVENT-DRIVEN NEURAL COMPUTING ARCHITECTURE IN A SCALAB...
- Publication number 20200065658
- Publication date Feb 27, 2020
- International Business Machines Corporation
- Filipp Akopyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR SPIKING NEURAL NETWORK COMPUTING BASED ON...
- Publication number 20200019839
- Publication date Jan 16, 2020
- The Board of Trustees of the Leland Stanford Junior University
- Kwabena Adu Boahen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR SPIKING NEURAL NETWORK COMPUTING BASED ON...
- Publication number 20200019838
- Publication date Jan 16, 2020
- The Board of Trustees of the Leland Stanford Junior University
- Kwabena Adu Boahen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR SPIKING NEURAL NETWORK COMPUTING BASED ON...
- Publication number 20200019837
- Publication date Jan 16, 2020
- The Board of Trustees of the Leland Stanford Junior University
- Kwabena Adu Boahen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER ASYNCHRONOUS GPS BASEBAND PROCESSOR
- Publication number 20190317222
- Publication date Oct 17, 2019
- Cornell University
- Rajit Manohar
- G01 - MEASURING TESTING
Information Patent Application
METHODS AND SYSTEMS FOR SYNCHRONIZATION BETWEEN MULTIPLE CLOCK DOMAINS
- Publication number 20190007190
- Publication date Jan 3, 2019
- Cornell University
- Rajit Manohar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHODS AND SYSTEMS FOR SYNCHRONIZATION BETWEEN MULTIPLE CLOCK DOMAINS
- Publication number 20170214514
- Publication date Jul 27, 2017
- Cornell University
- Rajit Manohar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
AUTOMATED LAYOUT FOR INTEGRATED CIRCUITS WITH NONSTANDARD CELLS
- Publication number 20160085898
- Publication date Mar 24, 2016
- Cornell University
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEUROMORPHIC EVENT-DRIVEN NEURAL COMPUTING ARCHITECTURE IN A SCALAB...
- Publication number 20150262055
- Publication date Sep 17, 2015
- Cornell University
- Filipp Akopyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS PIPELINED INTERCONNECT ARCHITECTURE WITH FANOUT SUPPORT
- Publication number 20150229589
- Publication date Aug 13, 2015
- Achronix Semiconductor Corporation
- Rajit Manohar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW POWER ASYNCHRONOUS GPS BASEBAND PROCESSOR
- Publication number 20150022397
- Publication date Jan 22, 2015
- Rajit Manohar
- G01 - MEASURING TESTING
Information Patent Application
ENERGY-EFFICIENT PIPELINE CIRCUIT TEMPLATES FOR HIGH-PERFORMANCE AS...
- Publication number 20140372784
- Publication date Dec 18, 2014
- Cornell University
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE LOGIC FABRICS FOR INTEGRATED CIRCUITS AND SYSTEMS AN...
- Publication number 20140137064
- Publication date May 15, 2014
- Achronix Semiconductor Corporation
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERAND-OPTIMIZED ASYNCHRONOUS FLOATING-POINT UNITS AND METHOD OF U...
- Publication number 20130124592
- Publication date May 16, 2013
- Cornell University
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR ZERO-DELAY WAKEUP FOR POWER GATED ASYNCHRON...
- Publication number 20130099570
- Publication date Apr 25, 2013
- Rajit Manohar
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
NEUROMORPHIC EVENT-DRIVEN NEURAL COMPUTING ARCHITECTURE IN A SCALAB...
- Publication number 20130073497
- Publication date Mar 21, 2013
- Cornell University
- Filipp Akopyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESET MECHANISM CONVERSION
- Publication number 20120180012
- Publication date Jul 12, 2012
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE LOGIC FABRICS FOR INTEGRATED CIRCUITS AND SYSTEMS AN...
- Publication number 20120119781
- Publication date May 17, 2012
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ONE PHASE LOGIC
- Publication number 20120112792
- Publication date May 10, 2012
- Raymond Nijssen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ONE PHASE LOGIC
- Publication number 20110298495
- Publication date Dec 8, 2011
- ACHRONIX SEMICONDUCTOR CORPORATION
- Raymond Nijssen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RECONFIGURABLE LOGIC FABRICS FOR INTEGRATED CIRCUITS AND SYSTEMS AN...
- Publication number 20110169524
- Publication date Jul 14, 2011
- ACHRONIX SEMICONDUCTOR CORPORATION
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS CONVERSION CIRCUITRY APPARATUS, SYSTEMS, AND METHODS
- Publication number 20110130171
- Publication date Jun 2, 2011
- ACHRONIX SEMICONDUCTOR CORPORATION
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYCHRONOUS SYSTEM ANALYSIS
- Publication number 20110078644
- Publication date Mar 31, 2011
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS CONVERSION CIRCUITRY APPARATUS, SYSTEMS, AND METHODS
- Publication number 20110062987
- Publication date Mar 17, 2011
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TOKEN ENHANCED ASYNCHRONOUS CONVERSION OF SYNCHONOUS CIRCUITS
- Publication number 20110066986
- Publication date Mar 17, 2011
- Virantha Ekanayake
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CLOCK ASYNCHRONOUS LOGIC CIRCUITS
- Publication number 20110066873
- Publication date Mar 17, 2011
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING

Rajit Manohar

Person

Patents Grantslast 30 patents

Neuromorphic event-driven neural computing architecture in a scalab...

Low power asynchronous GPS baseband processor

Neuromorphic event-driven neural computing architecture in a scalab...

Methods and systems for synchronization between multiple clock domains

Low power asynchronous GPS baseband processor

Methods and systems for synchronization between multiple clock domains

Automated layout for integrated circuits with nonstandard cells

Energy-efficient pipeline circuit templates for high-performance as...

Systems and methods for zero-delay wakeup for power gated asynchron...

Operand-optimized asynchronous floating-point units and method of u...

Asynchronous pipelined interconnect architecture with fanout support

Neuromorphic event-driven neural computing architecture in a scalab...

Asynchronous pipelined interconnect architecture with fanout support

Reconfigurable logic fabrics for integrated circuits and systems an...

Neuromorphic event-driven neural computing architecture in a scalab...

Asychronous system analysis

One phase logic

Reconfigurable logic fabrics for integrated circuits and systems an...

Automated conversion of synchronous to asynchronous circuit design...

Reset mechanism conversion

Converting a synchronous circuit design into an asynchronous design

Programmable crossbar structures in asynchronous systems

Multi-clock asynchronous logic circuits

Synchronous to asynchronous logic conversion

Token enhanced asynchronous conversion of synchonous circuits

Fault tolerant asynchronous circuits

Non-predicated to predicated conversion of asynchronous representat...

Reset mechanism conversion

Reconfigurable logic fabrics for integrated circuits and systems an...

One phase logic

Patents Applicationslast 30 patents

DISTRIBUTED SYSTEM OF COMPUTER ARCHITECTURES

OBJECT LINEARIZATION FOR COMMUNICATIONS

ACCELERATION OF COMMUNICATIONS

MODULAR, EXTENSIBLE COMPUTER PROCESSING ARCHITECTURE

NEUROMORPHIC EVENT-DRIVEN NEURAL COMPUTING ARCHITECTURE IN A SCALAB...

METHODS AND APPARATUS FOR SPIKING NEURAL NETWORK COMPUTING BASED ON...

METHODS AND APPARATUS FOR SPIKING NEURAL NETWORK COMPUTING BASED ON...

METHODS AND APPARATUS FOR SPIKING NEURAL NETWORK COMPUTING BASED ON...

LOW POWER ASYNCHRONOUS GPS BASEBAND PROCESSOR

METHODS AND SYSTEMS FOR SYNCHRONIZATION BETWEEN MULTIPLE CLOCK DOMAINS

METHODS AND SYSTEMS FOR SYNCHRONIZATION BETWEEN MULTIPLE CLOCK DOMAINS

AUTOMATED LAYOUT FOR INTEGRATED CIRCUITS WITH NONSTANDARD CELLS

NEUROMORPHIC EVENT-DRIVEN NEURAL COMPUTING ARCHITECTURE IN A SCALAB...

ASYNCHRONOUS PIPELINED INTERCONNECT ARCHITECTURE WITH FANOUT SUPPORT

LOW POWER ASYNCHRONOUS GPS BASEBAND PROCESSOR

ENERGY-EFFICIENT PIPELINE CIRCUIT TEMPLATES FOR HIGH-PERFORMANCE AS...

RECONFIGURABLE LOGIC FABRICS FOR INTEGRATED CIRCUITS AND SYSTEMS AN...

OPERAND-OPTIMIZED ASYNCHRONOUS FLOATING-POINT UNITS AND METHOD OF U...

SYSTEMS AND METHODS FOR ZERO-DELAY WAKEUP FOR POWER GATED ASYNCHRON...

NEUROMORPHIC EVENT-DRIVEN NEURAL COMPUTING ARCHITECTURE IN A SCALAB...

RESET MECHANISM CONVERSION

RECONFIGURABLE LOGIC FABRICS FOR INTEGRATED CIRCUITS AND SYSTEMS AN...

ONE PHASE LOGIC

ONE PHASE LOGIC

RECONFIGURABLE LOGIC FABRICS FOR INTEGRATED CIRCUITS AND SYSTEMS AN...

ASYNCHRONOUS CONVERSION CIRCUITRY APPARATUS, SYSTEMS, AND METHODS

ASYCHRONOUS SYSTEM ANALYSIS

ASYNCHRONOUS CONVERSION CIRCUITRY APPARATUS, SYSTEMS, AND METHODS

TOKEN ENHANCED ASYNCHRONOUS CONVERSION OF SYNCHONOUS CIRCUITS

MULTI-CLOCK ASYNCHRONOUS LOGIC CIRCUITS